| /src/sys/arch/arm/dts/ |
| sun8i-h3-orangepi-plus2e.dts | 32 opp-1200000000 {
33 opp-hz = /bits/ 64 <1200000000>;
34 opp-microvolt = <1320000 1320000 1320000>;
38 opp-1296000000 {
39 opp-hz = /bits/ 64 <1296000000>;
40 opp-microvolt = <1340000 1340000 1340000>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/allwinner/ |
| sun8i-a33.dtsi | 49 cpu0_opp_table: opp-table-cpu {
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
55 opp-microvolt = <1040000>;
59 opp-240000000 {
60 opp-hz = /bits/ 64 <240000000>;
61 opp-microvolt = <1040000>;
65 opp-312000000 {
66 opp-hz = /bits/ 64 <312000000>
[all...] |
| sun8i-h3.dtsi | 47 cpu0_opp_table: opp-table-cpu {
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
57 opp-816000000 {
58 opp-hz = /bits/ 64 <816000000>;
59 opp-microvolt = <1100000 1100000 1300000>;
63 opp-1008000000 {
64 opp-hz = /bits/ 64 <1008000000>
[all...] |
| sun8i-a83t.dtsi | 203 cpu0_opp_table: opp-table-cluster0 {
205 opp-shared;
207 opp-480000000 {
208 opp-hz = /bits/ 64 <480000000>;
209 opp-microvolt = <840000>;
213 opp-600000000 {
214 opp-hz = /bits/ 64 <600000000>;
215 opp-microvolt = <840000>;
219 opp-720000000 {
220 opp-hz = /bits/ 64 <720000000>
[all...] |
| sun8i-a33-sinlinx-sina33.dts | 85 opp-1104000000 {
86 opp-hz = /bits/ 64 <1104000000>;
87 opp-microvolt = <1320000>;
91 opp-1200000000 {
92 opp-hz = /bits/ 64 <1200000000>;
93 opp-microvolt = <1320000>;
|
| sun8i-r16-bananapi-m2m.dts | 108 opp-1104000000 {
109 opp-hz = /bits/ 64 <1104000000>;
110 opp-microvolt = <1320000>;
114 opp-1200000000 {
115 opp-hz = /bits/ 64 <1200000000>;
116 opp-microvolt = <1320000>;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_opp.c | 146 struct output_pixel_processor *opp,
149 struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp);
237 struct output_pixel_processor *opp,
242 struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp);
248 if (opp->dyn_expansion == DYN_EXPANSION_DISABLE)
280 struct output_pixel_processor *opp,
283 struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp);
290 struct output_pixel_processor *opp,
294 struct dcn10_opp *oppn10 = TO_DCN10_OPP(opp);
302 opp,
[all...] |
| dcn10_opp.h | 30 #include "opp.h"
32 #define TO_DCN10_OPP(opp)\
33 container_of(opp, struct dcn10_opp, base)
168 struct output_pixel_processor *opp,
174 struct output_pixel_processor *opp,
179 struct output_pixel_processor *opp,
183 struct output_pixel_processor *opp,
187 void opp1_pipe_clock_control(struct output_pixel_processor *opp, bool enable);
189 void opp1_destroy(struct output_pixel_processor **opp);
|
| amdgpu_dcn10_hw_sequencer.c | 46 #include "opp.h"
330 DTN_INFO("MPCC: OPP DPP MPCCBOT MODE ALPHA_MODE PREMULT OVERLAP_ONLY IDLE\n");
352 * For DCN2 and greater, a register on the OPP is used to
819 /* TODO: OPP FMT, ABM. etc. should be done here. */
820 /* or FPGA now. instance 0 only. TODO: move to opp.c */
824 pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
825 pipe_ctx->stream_res.opp,
1038 struct output_pixel_processor *opp = pipe_ctx->stream_res.opp; local
1040 mpc_tree_params = &(opp->mpc_tree_params)
[all...] |
| amdgpu_dcn10_resource.c | 657 struct dcn10_opp *opp = local
660 if (!opp) {
665 dcn10_opp_construct(opp, ctx, inst,
667 return &opp->base;
1152 idle_pipe->stream_res.opp = head_pipe->stream_res.opp;
1492 /* mem input -> ipp -> dpp -> opp -> TG */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_opp.c | 417 struct output_pixel_processor *opp,
420 struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
428 struct output_pixel_processor *opp,
431 struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
437 static void program_formatter_420_memory(struct output_pixel_processor *opp)
439 struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
457 struct output_pixel_processor *opp,
462 struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
496 static void program_formatter_reset_dig_resync_fifo(struct output_pixel_processor *opp)
498 struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
[all...] |
| dce_opp.h | 31 #include "opp.h"
34 #define FROM_DCE11_OPP(opp)\
35 container_of(opp, struct dce110_opp, base)
266 /* OPP RELATED */
267 #define TO_DCE110_OPP(opp)\
268 container_of(opp, struct dce110_opp, base)
284 void dce110_opp_destroy(struct output_pixel_processor **opp);
290 struct output_pixel_processor *opp,
294 struct output_pixel_processor *opp,
298 struct output_pixel_processor *opp,
[all...] |
| dmub_psr.c | 154 if (pipe_ctx->stream_res.opp)
155 copy_settings_data->opp_inst = pipe_ctx->stream_res.opp->inst;
|
| /src/sys/kern/ |
| subr_disklabel.c | 61 struct partition *opp, *npp; local
93 opp = &olp->d_partitions[i];
99 if (npp->p_fstype == FS_UNUSED && opp->p_fstype != FS_UNUSED) {
100 *npp = *opp;
103 if (npp->p_offset != opp->p_offset || npp->p_size < opp->p_size)
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| opp.h | 1 /* $NetBSD: opp.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */
277 struct output_pixel_processor *opp,
282 struct output_pixel_processor *opp,
288 struct output_pixel_processor *opp,
293 struct output_pixel_processor *opp,
297 void (*opp_destroy)(struct output_pixel_processor **opp);
300 struct output_pixel_processor *opp,
305 struct output_pixel_processor *opp,
309 struct output_pixel_processor *opp,
318 struct output_pixel_processor *opp);
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/aspeed/ |
| Makefile | 51 aspeed-bmc-opp-lanyang.dtb \
52 aspeed-bmc-opp-mowgli.dtb \
53 aspeed-bmc-opp-nicole.dtb \
54 aspeed-bmc-opp-palmetto.dtb \
55 aspeed-bmc-opp-romulus.dtb \
56 aspeed-bmc-opp-swift.dtb \
57 aspeed-bmc-opp-tacoma.dtb \
58 aspeed-bmc-opp-vesnin.dtb \
59 aspeed-bmc-opp-witherspoon.dtb \
60 aspeed-bmc-opp-zaius.dtb
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| dcn20_opp.h | 32 #define TO_DCN20_OPP(opp)\
33 container_of(opp, struct dcn20_opp, base)
143 struct output_pixel_processor *opp,
151 bool opp2_dpg_is_blanked(struct output_pixel_processor *opp);
154 struct output_pixel_processor *opp,
158 struct output_pixel_processor *opp,
|
| amdgpu_dcn20_opp.c | 47 struct output_pixel_processor *opp,
55 struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp);
276 opp2_dpg_set_blank_color(opp, solid_color);
293 struct output_pixel_processor *opp,
296 struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp);
311 bool opp2_dpg_is_blanked(struct output_pixel_processor *opp)
313 struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp);
329 struct output_pixel_processor *opp,
332 struct dcn20_opp *oppn20 = TO_DCN20_OPP(opp);
|
| amdgpu_dcn20_hwseq.c | 47 #include "opp.h"
283 struct output_pixel_processor *opp = NULL; local
288 /* program opp dpg blank color */
300 opp = dc->res_pool->opps[opp_id_src0];
308 opp->funcs->opp_set_disp_pattern_generator(
309 opp,
328 hws->funcs.wait_for_blank_complete(opp);
618 int opp_inst[MAX_PIPES] = { pipe_ctx->stream_res.opp->inst };
630 opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst;
664 odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control
[all...] |
| dcn20_hwseq.h | 132 struct output_pixel_processor *opp);
|
| /src/sys/dev/fdt/ |
| cpufreq_dt.c | 96 struct cpufreq_dt_opp *opp = NULL; local
104 opp = &sc->sc_opp[n];
107 if (opp == NULL)
112 new_uv = opp->voltage_uv;
134 const u_int latency_us = howmany(opp->latency_ns, 1000);
343 const u_int *opp; local
346 opp = fdtbus_get_prop(phandle, "operating-points", &len);
352 for (i = 0; i < sc->sc_nopp; i++, opp += 2) {
353 sc->sc_opp[i].freq_khz = be32toh(opp[0]);
354 sc->sc_opp[i].voltage_uv = be32toh(opp[1])
364 struct fdt_opp_info * const *opp; local
541 struct cpufreq_dt_opp * const opp = &sc->sc_opp[0]; local
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt7622.dtsi | 23 cpu_opp_table: opp-table {
25 opp-shared;
26 opp-300000000 {
27 opp-hz = /bits/ 64 <30000000>;
28 opp-microvolt = <950000>;
31 opp-437500000 {
32 opp-hz = /bits/ 64 <437500000>;
33 opp-microvolt = <1000000>;
36 opp-600000000 {
37 opp-hz = /bits/ 64 <600000000>
[all...] |
| mt2712e.dtsi | 22 cluster0_opp: opp-table-0 {
24 opp-shared;
26 opp-hz = /bits/ 64 <598000000>;
27 opp-microvolt = <1000000>;
30 opp-hz = /bits/ 64 <702000000>;
31 opp-microvolt = <1000000>;
34 opp-hz = /bits/ 64 <793000000>;
35 opp-microvolt = <1000000>;
39 cluster1_opp: opp-table-1 {
41 opp-shared
[all...] |
| /src/sys/dev/nand/ |
| nandemulator.c | 230 struct onfi_parameter_page *opp; local
234 opp = &sc->sc_parameter_page[i];
236 opp->param_signature = htole32(*(uint32_t *)sig);
237 opp->param_pagesize = htole32(sc->sc_page_size);
238 opp->param_blocksize = htole32(sc->sc_block_size);
239 opp->param_sparesize = htole16(sc->sc_spare_size);
240 opp->param_lunsize = htole32(sc->sc_lun_size);
241 opp->param_numluns = 1;
243 opp->param_manufacturer_id = 0x00;
244 memcpy(opp->param_manufacturer
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| hw_sequencer_private.h | 139 bool (*wait_for_blank_complete)(struct output_pixel_processor *opp);
|
