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  /src/external/gpl3/gcc/dist/gcc/
genversion.cc 26 phase (the latter may be an empty string). */
36 char phase = 0; local
45 /* For releases the development phase is an empty string, for
49 On the trunk the development phase is "experimental". */
50 phase = DEVPHASE[0];
51 if (phase == '\0'
53 phase = '*';
58 v[3] = phase;
dumpfile.h 578 extern void dump_function (int phase, tree fn);
649 extern void dump_function (int phase, tree fn);
686 /* Return the dump_file_info for the given phase. */
688 get_dump_file_info (int phase) const;
693 /* Return the name of the dump file for the given phase.
696 get_dump_file_name (int phase, int part = -1) const;
704 /* Start a dump for PHASE. Store user-supplied dump flags in
710 dump_start (int phase, dump_flags_t *flag_ptr);
712 /* Finish a tree dump for PHASE and close associated dump streams. Also
715 dump_finish (int phase);
    [all...]
  /src/external/gpl3/gcc.old/dist/gcc/
genversion.cc 26 phase (the latter may be an empty string). */
36 char phase = 0; local
45 /* For releases the development phase is an empty string, for
49 On the trunk the development phase is "experimental". */
50 phase = DEVPHASE[0];
51 if (phase == '\0'
53 phase = '*';
58 v[3] = phase;
dumpfile.h 578 extern void dump_function (int phase, tree fn);
649 extern void dump_function (int phase, tree fn);
689 /* Return the dump_file_info for the given phase. */
691 get_dump_file_info (int phase) const;
696 /* Return the name of the dump file for the given phase.
699 get_dump_file_name (int phase, int part = -1) const;
707 /* Start a dump for PHASE. Store user-supplied dump flags in
713 dump_start (int phase, dump_flags_t *flag_ptr);
715 /* Finish a tree dump for PHASE and close associated dump streams. Also
718 dump_finish (int phase);
    [all...]
  /src/sys/arch/arm/sunxi/
sunxi_ccu_phase.c 61 struct sunxi_ccu_phase *phase = &clk->u.phase; local
77 val = CCU_READ(sc, phase->reg);
78 delay = __SHIFTOUT(val, phase->mask);
87 struct sunxi_ccu_phase *phase = &clk->u.phase; local
109 val = CCU_READ(sc, phase->reg);
110 val &= ~phase->mask;
111 val |= __SHIFTIN(delay, phase->mask);
112 CCU_WRITE(sc, phase->reg, val)
121 struct sunxi_ccu_phase *phase = &clk->u.phase; local
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_pm.c 56 }, **phase; local
82 for (phase = phases; *phase; phase++) {
85 while ((obj = first_mm_object(*phase))) {
102 list_splice_tail(&keep, *phase);
  /src/sys/arch/amiga/dev/
sci.c 205 int flags, phase, stat; local
212 phase = DATA_IN_PHASE;
214 phase = DATA_OUT_PHASE;
216 phase = STATUS_PHASE;
223 if (phase == STATUS_PHASE || flags & XS_CTL_POLL)
225 xs->data, xs->datalen, phase);
406 int phase)
415 *dev->sci_tcmd = phase;
446 sci_ixfer_in(struct sci_softc *dev, int len, register u_char *buf, int phase)
461 *dev->sci_tcmd = phase;
508 u_char phase; local
600 u_char phase, *addr; local
    [all...]
  /src/external/bsd/jemalloc.old/dist/test/unit/
tsd.c 140 atomic_u32_t phase; member in struct:__anon68
146 /* PHASE 0 */
157 atomic_store_u32(&data->phase, 1, ATOMIC_SEQ_CST);
159 /* PHASE 2 */
160 while (atomic_load_u32(&data->phase, ATOMIC_SEQ_CST) != 2) {
164 atomic_store_u32(&data->phase, 3, ATOMIC_SEQ_CST);
166 /* PHASE 4 */
167 while (atomic_load_u32(&data->phase, ATOMIC_SEQ_CST) != 4) {
171 atomic_store_u32(&data->phase, 5, ATOMIC_SEQ_CST);
173 /* PHASE 6 *
    [all...]
  /src/external/bsd/jemalloc/dist/test/unit/
tsd.c 194 atomic_u32_t phase; member in struct:__anon105
200 /* PHASE 0 */
211 atomic_store_u32(&data->phase, 1, ATOMIC_SEQ_CST);
213 /* PHASE 2 */
214 while (atomic_load_u32(&data->phase, ATOMIC_SEQ_CST) != 2) {
218 atomic_store_u32(&data->phase, 3, ATOMIC_SEQ_CST);
220 /* PHASE 4 */
221 while (atomic_load_u32(&data->phase, ATOMIC_SEQ_CST) != 4) {
225 atomic_store_u32(&data->phase, 5, ATOMIC_SEQ_CST);
227 /* PHASE 6 *
    [all...]
  /src/sys/arch/hpcsh/hpcsh/
debug.c 46 int phase; member in struct:intr_state_rgb16
73 intr_state_rgb16->cnt = 0, intr_state_rgb16->phase ^= 1;
78 intr_state_rgb16->phase ? ~color : color;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dccg.c 58 int modulo, phase; local
60 // phase / modulo = dpp pipe clk / dpp global clk
62 phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
64 if (phase > 0xff) {
66 phase = 0xff;
70 DPPCLK0_DTO_PHASE, phase,
  /src/external/gpl3/binutils/dist/gprofng/src/
info.h 44 uint16_t phase; /* The compiler phase that produced this info */ member in struct:info_header
64 uint32_t type; /* The type of this entry. High 8 bits is the phase.
68 uint32_t msgnum; /* Message number. High 8 bits is the phase.
  /src/external/gpl3/binutils.old/dist/gprofng/src/
info.h 44 uint16_t phase; /* The compiler phase that produced this info */ member in struct:info_header
64 uint32_t type; /* The type of this entry. High 8 bits is the phase.
68 uint32_t msgnum; /* Message number. High 8 bits is the phase.
  /src/external/gpl3/gcc/dist/contrib/
dglib.pm 85 # detail: For multi-phase (e.g. compile/link/execute), this will be
86 # the furthest phase which the test was able to attempt,
87 # so if the result is FAIL and this is "link phase", the test
230 my $phase = ""; # compile/link/execute
236 $phase = "compile";
240 $phase = "link";
242 $phase = "execute";
247 $phase = "compile";
249 $phase = "execute";
283 $currtest->{detail} = "$phase phase"
    [all...]
  /src/external/gpl3/gcc.old/dist/contrib/
dglib.pm 85 # detail: For multi-phase (e.g. compile/link/execute), this will be
86 # the furthest phase which the test was able to attempt,
87 # so if the result is FAIL and this is "link phase", the test
230 my $phase = ""; # compile/link/execute
236 $phase = "compile";
240 $phase = "link";
242 $phase = "execute";
247 $phase = "compile";
249 $phase = "execute";
283 $currtest->{detail} = "$phase phase"
    [all...]
  /src/sys/arch/atari/dev/
ncr5380.c 97 * device is busy internally and the first SCSI-phase will be delayed.
308 reqp->phase = NR_PHASE;
376 tmp->phase = NR_PHASE;
649 transfer_dma(reqp, reqp->phase, 0);
680 connected->phase, 0);
711 uint8_t phase; local
739 * Set phase bits to 0, otherwise the 5380 won't drive the bus during
823 * phase immediately after the selection.
885 reqp->phase = PH_CMD;
896 phase = PH_MSGOUT
967 uint8_t tmp, phase; local
1255 uint8_t phase; local
1664 uint8_t phase; local
    [all...]
ncr5380reg.h 99 #define SC_PHS_MTCH 0x08 /* R - Phase Match */
125 #define PH_OUT(phase) (!(phase & 1)) /* TRUE if output phase */
126 #define PH_IN(phase) (phase & 1) /* TRUE if input phase */
162 * command phase (ignoring ATN), then we flag it in the
194 uint8_t phase; /* current SCSI phase */ member in struct:req_q
    [all...]
  /src/sys/arch/mac68k/dev/
ncr5380.c 97 * device is busy internally and the first SCSI-phase will be delayed.
300 reqp->phase = NR_PHASE;
369 tmp->phase = NR_PHASE;
634 transfer_dma(reqp, reqp->phase, 0);
661 transfer_dma(connected, connected->phase, 0);
692 u_char phase; local
719 * Set phase bits to 0, otherwise the 5380 won't drive the bus during
803 * phase immediately after the selection.
865 reqp->phase = PH_CMD;
876 phase = PH_MSGOUT
946 u_char tmp, phase; local
1232 u_char phase; local
1629 u_char phase; local
    [all...]
ncr5380reg.h 99 #define SC_PHS_MTCH 0x08 /* R - Phase Match */
125 #define PH_OUT(phase) (!(phase & 1)) /* TRUE if output phase */
126 #define PH_IN(phase) (phase & 1) /* TRUE if input phase */
162 * command phase (ignoring ATN), then we flag it in the
194 u_char phase; /* current SCSI phase */ member in struct:req_q
    [all...]
  /src/crypto/external/apache2/openssl/dist/crypto/
self_test_core.c 23 const char *phase; member in struct:ossl_self_test_st
81 (char *)st->phase, 0);
99 ret->phase = "";
116 st->phase = OSSL_SELF_TEST_PHASE_START;
131 st->phase = (ret == 1 ? OSSL_SELF_TEST_PHASE_PASS : OSSL_SELF_TEST_PHASE_FAIL);
135 st->phase = OSSL_SELF_TEST_PHASE_NONE;
152 st->phase = OSSL_SELF_TEST_PHASE_CORRUPT;
  /src/crypto/external/bsd/openssl/dist/crypto/
self_test_core.c 24 const char *phase; member in struct:ossl_self_test_st
90 (char *)st->phase, 0);
110 ret->phase = "";
127 st->phase = OSSL_SELF_TEST_PHASE_START;
142 st->phase =
147 st->phase = OSSL_SELF_TEST_PHASE_NONE;
164 st->phase = OSSL_SELF_TEST_PHASE_CORRUPT;
  /src/sys/arch/hp300/stand/common/
scsi.c 210 ixfer_start(volatile struct scsidevice *hd, int len, uint8_t phase, int wait)
216 hd->scsi_pctl = phase;
271 uint8_t phase, ints; local
280 * Wait for a phase change (or error) then let the device
284 phase = CMD_PHASE;
287 switch (phase) {
290 if (ixfer_start(hd, clen, phase, wait))
293 phase = xferphase;
300 if (ixfer_start(hd, len, phase, wait) ||
303 phase = STATUS_PHASE
    [all...]
  /src/external/bsd/ntp/dist/libparse/
clk_meinberg.c 227 unsigned short phase; /* current input phase */ member in struct:msg_buf
612 if ( msg_buf->phase == MBG_NONE )
620 msg_buf->phase = MBG_HEADER; /* receiving header */
627 msg_buf->phase = MBG_STRING; /* prepare to receive ASCII ETX delimited message */
645 if ((msg_buf->phase == MBG_STRING) &&
653 msg_buf->phase = MBG_NONE; /* buffer overflow - discard */
660 switch (msg_buf->phase)
669 parseprintf(DD_PARSE, ("gps_input: %s complete\n", (msg_buf->phase == MBG_DATA) ? "data" : "header"));
676 msg_buf->phase = MBG_NONE
    [all...]
  /src/external/bsd/zstd/dist/lib/compress/
zstd_cwksp.h 170 ZSTD_cwksp_alloc_phase_e phase; member in struct:__anon8654
309 * Moves the cwksp to the next phase, and does any necessary allocations.
310 * cwksp initialization must necessarily go through each phase in order.
314 ZSTD_cwksp_internal_advance_phase(ZSTD_cwksp* ws, ZSTD_cwksp_alloc_phase_e phase)
316 assert(phase >= ws->phase);
317 if (phase > ws->phase) {
319 if (ws->phase < ZSTD_cwksp_alloc_aligned_init_once &&
320 phase >= ZSTD_cwksp_alloc_aligned_init_once)
442 const ZSTD_cwksp_alloc_phase_e phase = ZSTD_cwksp_alloc_aligned_init_once; local
    [all...]
  /src/external/gpl3/binutils/dist/ld/
ldexp.c 336 if (expld.phase == lang_final_phase_enum
348 if (expld.phase == lang_first_phase_enum
353 else if (seg->phase == exp_seg_align_seen
354 || seg->phase == exp_seg_relro_seen)
356 seg->phase = exp_seg_end_seen;
359 else if (seg->phase == exp_seg_done
360 || seg->phase == exp_seg_adjust
361 || seg->phase == exp_seg_relro_adjust)
378 if (expld.phase != lang_first_phase_enum)
406 if (expld.phase != lang_first_phase_enum
    [all...]

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