| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-aarch64-ginsn.c | 248 if ((addr->addr.preind || addr->addr.postind) && addr->addr.writeback)
345 if (addr->addr.preind && addr->addr.writeback)
348 if (addr->addr.postind && addr->addr.writeback)
352 ginsn = (addr->addr.preind && addr->addr.writeback) ? ginsn_ind : ginsn_mem;
357 if (addr->addr.preind && addr->addr.writeback)
363 if (addr->addr.postind && addr->addr.writeback)
367 ginsn = (addr->addr.preind && addr->addr.writeback) ? ginsn_ind : ginsn_mem1;
413 if ((addr->addr.preind || addr->addr.postind) && addr->addr.writeback)
454 if (addr->addr.preind && addr->addr.writeback)
456 else if (addr->addr.postind && addr->addr.writeback)
[all...] |
| tc-arm.c | 559 unsigned writeback : 1; /* Operand has trailing ! */ member in struct:arm_it::__anon9986
915 _("cannot use writeback with PC-relative addressing")
5818 These three may have a trailing ! which causes .writeback to be set also.
5820 Postindexed addressing (.postind=1, .writeback=1):
6049 inst.operands[i].writeback = 1;
6076 inst.operands[i].writeback = 1;
6978 OP_RRnpctw, /* ARM register, not r15 in Thumb-state or with writeback,
7588 inst.operands[i].writeback = 1;
7636 inst.operands[i].writeback = 1;
7811 inst.operands[i].writeback = 1
[all...] |
| tc-aarch64.c | 4060 .pcrel=0; .preind=1; .postind=0; .writeback=0
4062 .pcrel=0; .preind=1; .postind=0; .writeback=1
4064 .pcrel=0; .preind=0; .postind=1; .writeback=1
4066 .pcrel=1; .preind=1; .postind=0; .writeback=0
4314 operand->addr.writeback = 1;
4320 operand->addr.writeback = 1;
4357 if (operand->addr.writeback)
7652 if (info->addr.writeback)
7670 && info->addr.writeback && info->addr.preind)
7672 && info->addr.writeback && info->addr.postind)
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-aarch64-ginsn.c | 248 if ((addr->addr.preind || addr->addr.postind) && addr->addr.writeback)
345 if (addr->addr.preind && addr->addr.writeback)
348 if (addr->addr.postind && addr->addr.writeback)
352 ginsn = (addr->addr.preind && addr->addr.writeback) ? ginsn_ind : ginsn_mem;
357 if (addr->addr.preind && addr->addr.writeback)
363 if (addr->addr.postind && addr->addr.writeback)
367 ginsn = (addr->addr.preind && addr->addr.writeback) ? ginsn_ind : ginsn_mem1;
413 if ((addr->addr.preind || addr->addr.postind) && addr->addr.writeback)
454 if (addr->addr.preind && addr->addr.writeback)
456 else if (addr->addr.postind && addr->addr.writeback)
[all...] |
| tc-arm.c | 559 unsigned writeback : 1; /* Operand has trailing ! */ member in struct:arm_it::__anon11458
915 _("cannot use writeback with PC-relative addressing")
5817 These three may have a trailing ! which causes .writeback to be set also.
5819 Postindexed addressing (.postind=1, .writeback=1):
6048 inst.operands[i].writeback = 1;
6075 inst.operands[i].writeback = 1;
6981 OP_RRnpctw, /* ARM register, not r15 in Thumb-state or with writeback,
7591 inst.operands[i].writeback = 1;
7639 inst.operands[i].writeback = 1;
7814 inst.operands[i].writeback = 1
[all...] |
| tc-aarch64.c | 4043 .pcrel=0; .preind=1; .postind=0; .writeback=0
4045 .pcrel=0; .preind=1; .postind=0; .writeback=1
4047 .pcrel=0; .preind=0; .postind=1; .writeback=1
4049 .pcrel=1; .preind=1; .postind=0; .writeback=0
4297 operand->addr.writeback = 1;
4303 operand->addr.writeback = 1;
4340 if (operand->addr.writeback)
7595 if (info->addr.writeback)
7613 && info->addr.writeback && info->addr.preind)
7615 && info->addr.writeback && info->addr.postind)
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/ |
| arm-tdep.h | 194 int rn; /* Writeback register. */
196 unsigned int writeback : 1; /* Perform base-register writeback. */ member in struct:arm_displaced_step_copy_insn_closure::__anon164::__anon165
217 unsigned int writeback : 1; member in struct:arm_displaced_step_copy_insn_closure::__anon164::__anon167
|
| arm-tdep.c | 1246 /* Writeback SP to account for the saved registers. */
5887 if (dsc->u.ldst.writeback)
5894 int writeback, unsigned int rn)
5912 dsc->u.ldst.writeback = writeback;
5957 doesn't support writeback, so pass 0. */
6514 /* Handle register writeback. */
6515 if (dsc->u.ldst.writeback)
6540 /* Writeback. */
6541 if (dsc->u.ldst.writeback)
6783 int writeback = (bit (insn, 24) == 0 || bit (insn, 21) != 0); local
7055 int writeback = bit (insn, 21); local
7165 int writeback = bit (insn1, 5); local
[all...] |
| /src/external/gpl3/gdb/dist/gdb/ |
| arm-tdep.h | 194 int rn; /* Writeback register. */
196 unsigned int writeback : 1; /* Perform base-register writeback. */ member in struct:arm_displaced_step_copy_insn_closure::__anon232::__anon233
217 unsigned int writeback : 1; member in struct:arm_displaced_step_copy_insn_closure::__anon232::__anon235
|
| arm-tdep.c | 1246 /* Writeback SP to account for the saved registers. */
5890 if (dsc->u.ldst.writeback)
5897 int writeback, unsigned int rn)
5915 dsc->u.ldst.writeback = writeback;
5960 doesn't support writeback, so pass 0. */
6517 /* Handle register writeback. */
6518 if (dsc->u.ldst.writeback)
6543 /* Writeback. */
6544 if (dsc->u.ldst.writeback)
6786 int writeback = (bit (insn, 24) == 0 || bit (insn, 21) != 0); local
7058 int writeback = bit (insn, 21); local
7168 int writeback = bit (insn1, 5); local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/aarch64/ |
| aarch64-ldp-fusion.cc | 206 int writeback,
452 // Ignore writeback accesses if the param says to do so.
1013 // non-writeback pair into a writeback pair, as it isn't otherwise clear
1132 // writeback form, extract two non-writeback memory accesses addressed
1197 // non-writeback pair) or contains the candidate insns used to form the pair
1202 // Bit I of INITIAL_WRITEBACK is set if INSNS[I] initially had writeback.
1209 // *ADD_DEF and the resulting writeback effect in *WRITEBACK_EFFECT.
1221 // not try to form writeback pairs here, and means we don't have t
2454 int writeback = 0; local
2606 int writeback = get_viable_bases (insns, base_cands, cand_mems, local
[all...] |
| falkor-tag-collision-avoidance.cc | 108 bool writeback; member in class:tag_insn_info
112 : insn (i), dest (d), base (b), offset (o), writeback (w), ldp (p)
138 if (!this->writeback)
564 /*Writeback is only supported for fixed-width modes. */
773 bool writeback = false;
779 if (get_load_info (insn, loop, &dest, &base, &offset, &writeback,
783 writeback, ldp);
772 bool writeback = false; local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| falkor-tag-collision-avoidance.cc | 108 bool writeback; member in class:tag_insn_info
112 : insn (i), dest (d), base (b), offset (o), writeback (w), ldp (p)
138 if (!this->writeback)
564 /*Writeback is only supported for fixed-width modes. */
773 bool writeback = false;
779 if (get_load_info (insn, loop, &dest, &base, &offset, &writeback,
783 writeback, ldp);
772 bool writeback = false; local
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_object_types.h | 59 void (*writeback)(struct drm_i915_gem_object *obj); member in struct:drm_i915_gem_object_ops
|
| i915_gem_pages.c | 168 if (obj->ops->writeback)
169 obj->ops->writeback(obj);
|
| i915_gem_shmem.c | 290 * instead of invoking writeback so they are aged and paged out
295 /* Begin writeback on each dirty page */
522 .writeback = shmem_writeback,
|
| /src/usr.bin/mail/ |
| quit.c | 75 writeback(FILE *res) function
411 (void)writeback(rbuf);
534 (void)writeback(rbuf);
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CGCall.h | 268 struct Writeback {
276 /// A value to "use" after the writeback, or null.
310 Writeback writeback = {srcLV, temporary, toUse}; local
311 Writebacks.push_back(writeback);
316 typedef llvm::iterator_range<SmallVectorImpl<Writeback>::const_iterator>
344 SmallVector<Writeback, 1> Writebacks;
|
| /src/external/lgpl3/gmp/dist/mpn/m88k/ |
| add_n.s | 40 ; load stalls and writeback contention. As a result, the instruction
|
| sub_n.s | 40 ; load stalls and writeback contention. As a result, the instruction
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| aarch64-dis.c | 1106 info->addr.writeback = 1;
1178 info->addr.writeback = 1;
1257 info->addr.writeback = 0;
1261 info->addr.writeback = 1;
1308 info->addr.writeback = 1;
1344 info->addr.writeback = 1;
1634 info->addr.writeback = false;
1708 info->addr.writeback = false;
1759 info->addr.writeback = false;
1781 info->addr.writeback = false
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| aarch64-dis.c | 1105 info->addr.writeback = 1;
1177 info->addr.writeback = 1;
1255 info->addr.writeback = 0;
1259 info->addr.writeback = 1;
1306 info->addr.writeback = 1;
1342 info->addr.writeback = 1;
1627 info->addr.writeback = false;
1701 info->addr.writeback = false;
1752 info->addr.writeback = false;
1774 info->addr.writeback = false
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| aarch64-dis.c | 1105 info->addr.writeback = 1;
1177 info->addr.writeback = 1;
1255 info->addr.writeback = 0;
1259 info->addr.writeback = 1;
1306 info->addr.writeback = 1;
1342 info->addr.writeback = 1;
1627 info->addr.writeback = false;
1701 info->addr.writeback = false;
1752 info->addr.writeback = false;
1774 info->addr.writeback = false
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| aarch64-dis.c | 1103 info->addr.writeback = 1;
1175 info->addr.writeback = 1;
1254 info->addr.writeback = 0;
1258 info->addr.writeback = 1;
1305 info->addr.writeback = 1;
1341 info->addr.writeback = 1;
1626 info->addr.writeback = false;
1700 info->addr.writeback = false;
1751 info->addr.writeback = false;
1773 info->addr.writeback = false
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 451 template<int shift, int WriteBack>
529 template<bool Writeback>
1579 // Writeback not allowed if Rn is in the target list.
1857 // On stores, the writeback operand precedes Rt.
1877 // On loads, the writeback operand comes after Rt.
1901 bool writeback = (P == 0) || (W == 1); local
1903 if (P && writeback)
1905 else if (!P && writeback)
1908 if (writeback && (Rn == 15 || Rn == Rt))
2008 bool writeback = (W == 1) | (P == 0) local
5564 bool writeback = (W == 1) | (P == 0); local
5601 bool writeback = (W == 1) | (P == 0); local
[all...] |
