| /src/sys/arch/powerpc/include/ |
| spr.h | 138 #define SPR_SPRG2 0x112 /* E468 SPR General 2 */
|
| /src/sys/arch/amiga/amiga/ |
| cc_registers.h | 163 #define R_BPL1DAT 0x112
|
| /src/sys/arch/hpcmips/dev/ |
| ite8181reg.h | 93 #define ITE8181_GUI_CC0R2 0x112
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| ppsmc.h | 185 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112)
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| ppsmc.h | 181 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112)
|
| r500_reg.h | 211 #define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112
|
| /src/external/bsd/ppp/dist/pppd/plugins/pppoe/ |
| pppoe.h | 133 #define TAG_MOTM 0x112
|
| /src/external/gpl3/binutils/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 78 { I("page_walk_l0_stage1_hit", 0x112, STXT("Page walk, L0 stage-1 hit")) },
|
| hwc_arm_ampere_1.h | 130 { I("bpu_hit_indirect_predictor", 0x112,
|
| /src/external/gpl3/binutils.old/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 78 { I("page_walk_l0_stage1_hit", 0x112, STXT("Page walk, L0 stage-1 hit")) },
|
| hwc_arm_ampere_1.h | 130 { I("bpu_hit_indirect_predictor", 0x112,
|
| /src/lib/libform/ |
| form.h | 103 #define REQ_PREV_CHAR (KEY_MAX + 0x112) /* move to the previous
|
| /src/sys/arch/powerpc/include/ibm4xx/ |
| dcr4xx.h | 132 #define DCR_DMA0_DA2 0x112 /* DMA Destination Address Register 2 */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| fiji_ppsmc.h | 197 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint16_t) 0x112)
|
| smu7_ppsmc.h | 194 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint16_t) 0x112)
|
| tonga_ppsmc.h | 218 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint16_t) 0x112)
|
| /src/sys/arch/powerpc/powerpc/ |
| db_disasm.c | 438 { 0x112, "sprg2" },
570 { 0x112, "dma0_da2" },
|
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_dp_helper.h | 509 #define DP_AUDIO_DELAY0 0x112 /* 1.2 */
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/input/ |
| linux-event-codes.h | 360 #define BTN_MIDDLE 0x112
|
| /src/external/bsd/openldap/dist/libraries/libldap/ |
| t61.c | 196 0, 0x100, 0, 0, 0, 0x112, 0, 0x1e20, 0, 0x12a, 0, 0, 0, 0, 0, 0x14c,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/ |
| bif_5_0_d.h | 420 #define mmPCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF6_FB 0x112
|
| /src/crypto/external/bsd/heimdal/dist/lib/hx509/ref/ |
| pkcs11.h | 1486 #define CKR_WRAPPED_KEY_LEN_RANGE (0x112)
|
| /src/sys/dev/qbus/ |
| qfont.c | 97 ,0x00 ,0x00 ,0x112 ,0x113 ,0x114 ,0x115 ,0x116 ,0x117 /* 136 */
132 ,0x00 ,0x00 ,0x112 ,0x113 ,0x114 ,0x115 ,0x116 ,0x117 /* 136 */
|
| /src/sys/external/bsd/drm/dist/shared-core/ |
| radeon_drv.h | 719 #define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| gfx_8_0_enum.h | 402 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_2TO2__1BLOCK_2TO1__1BLOCK_2TO2= 0x112,
1602 SC_PKR_DBHANG_FORCE_EOV = 0x112,
2559 SQ_PERF_SEL_ATC_INSTS_VMEM = 0x112,
3564 #define SQ_DPP_ROW_SR2 0x112
|
