| /src/sys/arch/hpcmips/dev/ |
| ite8181reg.h | 100 #define ITE8181_GUI_CC2R1 0x119
|
| /src/lib/libform/ |
| form.h | 116 #define REQ_BEG_LINE (KEY_MAX + 0x119) /* go to the beginning of
|
| /src/external/gpl3/binutils/dist/gprofng/src/ |
| hwc_arm_ampere_1.h | 136 { I("bpu_hit_rsb_and_mispredict", 0x119,
|
| /src/external/gpl3/binutils.old/dist/gprofng/src/ |
| hwc_arm_ampere_1.h | 136 { I("bpu_hit_rsb_and_mispredict", 0x119,
|
| /src/sys/arch/powerpc/include/ibm4xx/ |
| dcr4xx.h | 127 #define DCR_DMA0_CT3 0x119 /* DMA Count Register 3 */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| fiji_ppsmc.h | 202 #define PPSMC_MSG_PCIE_CascadePLLPowerDown ((uint16_t) 0x119)
|
| smu7_ppsmc.h | 199 #define PPSMC_MSG_PCIE_CascadePLLPowerDown ((uint16_t) 0x119)
|
| tonga_ppsmc.h | 223 #define PPSMC_MSG_PCIE_CascadePLLPowerDown ((uint16_t) 0x119)
|
| /src/external/bsd/openldap/dist/libraries/libldap/ |
| t61.c | 301 0, 0x105, 0, 0, 0, 0x119, 0, 0, 0, 0x12f, 0, 0, 0, 0, 0, 0x1eb,
|
| /src/sys/arch/powerpc/powerpc/ |
| db_disasm.c | 574 { 0x119, "dma0_ct3" },
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/ |
| bif_5_0_d.h | 427 #define mmPCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF13_FB 0x119
|
| /src/sys/dev/qbus/ |
| qfont.c | 100 ,0x12d ,0x118 ,0x119 ,0x11a ,0x11b ,0x00 ,0x00 ,0x11c /* 160 */
135 ,0x12d ,0x118 ,0x119 ,0x11a ,0x11b ,0x00 ,0x00 ,0x11c /* 160 */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| gfx_8_0_enum.h | 409 CB_PERF_SEL_CC_DCC_KEY_VALUE__3BLOCKS_2TO2__1BLOCK_2TO1= 0x119,
1609 SC_PA0_SC_DATA_FIFO_RD = 0x119,
2566 SQ_PERF_SEL_IFETCH_XNACK = 0x119,
3571 #define SQ_DPP_ROW_SR9 0x119
|
| gfx_8_1_enum.h | 409 CB_PERF_SEL_CC_DCC_KEY_VALUE__3BLOCKS_2TO2__1BLOCK_2TO1= 0x119,
1627 SC_PA0_SC_DATA_FIFO_RD = 0x119,
2584 SQ_PERF_SEL_IFETCH_XNACK = 0x119,
3589 #define SQ_DPP_ROW_SR9 0x119
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/ |
| gmc_7_1_d.h | 1182 #define ixMC_IO_DEBUG_EDC_RXPHASE_D1 0x119
|
| gmc_8_1_d.h | 1286 #define ixMC_IO_DEBUG_EDC_RXPHASE_D1 0x119
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_si_dpm.c | 255 { 0x119, 0x0001fffe, 1, 0x8, SISLANDS_CACCONFIG_CGIND },
256 { 0x119, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
552 { 0x119, 0x0001fffe, 1, 0x5, SISLANDS_CACCONFIG_CGIND },
553 { 0x119, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_si_dpm.c | 162 { 0x119, 0x0001fffe, 1, 0x8, SISLANDS_CACCONFIG_CGIND },
163 { 0x119, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
457 { 0x119, 0x0001fffe, 1, 0x5, SISLANDS_CACCONFIG_CGIND },
458 { 0x119, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
|
| /src/crypto/external/apache2/openssl/dist/crypto/perlasm/ |
| sparcv9_modes.pl | 1584 "movwtos" => 0x119 );
|
| /src/crypto/external/bsd/openssl/dist/crypto/perlasm/ |
| sparcv9_modes.pl | 1584 "movwtos" => 0x119 );
|
| /src/crypto/external/bsd/openssl.old/dist/crypto/perlasm/ |
| sparcv9_modes.pl | 1584 "movwtos" => 0x119 );
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| i386-mnem.h | 51 #define MN_vmovdqa32 0x119
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| i386-mnem.h | 51 #define MN_vmovdqa32 0x119
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| i386-mnem.h | 56 #define MN_sm2 0x119
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| i386-mnem.h | 51 #define MN_vmovdqa32 0x119
|
