/src/sys/dev/ic/ |
apple_smcreg.h | 50 #define APPLE_SMC_CMD_KEY_DESC 0x13
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ninjaata32reg.h | 85 #define NJATA32_REG_WD_SECTOR 0x13 /* len=1 R/W */ 86 #define NJATA32_REG_WD_LBA_LO 0x13 /* len=1 R/W */ 123 # define NJATA32_TIMING_PIO4 0x13 129 # define NJATA32_TIMING_DMA2 0x13
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/src/sys/external/bsd/drm2/include/video/ |
mipi_display.h | 36 #define MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM 0x13
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hsalsa20/ref2/ |
core_hsalsa20_ref2.c | 23 x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hsalsa20 43 x13 = LOAD32_LE(k + 24); 56 x13 ^= ROTL32(x9 + x5, 9); 57 x1 ^= ROTL32(x13 + x9, 13); 58 x5 ^= ROTL32(x1 + x13, 18); 80 x13 ^= ROTL32(x12 + x15, 9); 81 x14 ^= ROTL32(x13 + x12, 13); 82 x15 ^= ROTL32(x14 + x13, 18);
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/src/sys/arch/arm/amlogic/ |
meson_canvasreg.h | 35 #define DC_CAV_LUT_DATAH_REG CANVAS_REG(0x13)
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/src/sys/arch/sgimips/dev/ |
int2reg.h | 45 #define INT2_MAP_STATUS 0x13
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/src/sys/netinet/ |
igmp.h | 100 #define IGMP_DVMRP 0x13 /* DVMRP routing message */
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hchacha20/ |
core_hchacha20.c | 22 uint32_t x8, x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hchacha20 44 x13 = LOAD32_LE(in + 4); 50 QUARTERROUND(x1, x5, x9, x13); 55 QUARTERROUND(x2, x7, x8, x13); 64 STORE32_LE(out + 20, x13);
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/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
rk3288-veyron-jerry.dts | 89 0x3a 0x00 0x88 0x13 0x14 0x24 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 91 0x0e 0x09 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 93 0x88 0x13 0x14 0x28 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0a 0x05 0x0a 0x06 0x0a 95 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 96 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 99 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 100 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x30 103 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 104 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00 0x88 0x13 0x14 0x34 0x01 0x0c 107 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x0 [all...] |
/src/sys/arch/mac68k/obio/ |
grf_obioreg.h | 69 #define DAFB_CMAP_LUT 0x13
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/src/sys/dev/podulebus/ |
powerromreg.h | 26 #define PRID_MORLEY_TURBO 0x13 /* Morley Turbo 16 bit SCSI-1 */
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/dma/ |
x1000-dma.h | 24 #define X1000_DMA_UART1_RX 0x13
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x1830-dma.h | 22 #define X1830_DMA_UART1_RX 0x13
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/src/usr.sbin/btattach/ |
init_st.c | 59 case B460800: rate = 0x13; break;
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/salsa/ref/ |
core_salsa_ref.c | 15 uint32_t x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, local in function:crypto_core_salsa 37 j13 = x13 = LOAD32_LE(k + 24); 51 x13 ^= ROTL32(x9 + x5, 9); 52 x1 ^= ROTL32(x13 + x9, 13); 53 x5 ^= ROTL32(x1 + x13, 18); 75 x13 ^= ROTL32(x12 + x15, 9); 76 x14 ^= ROTL32(x13 + x12, 13); 77 x15 ^= ROTL32(x14 + x13, 18); 92 STORE32_LE(out + 52, x13 + j13);
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/src/sys/arch/x68k/dev/ |
rtclock_var.h | 69 #define RTC_MON 0x13 87 #define RTC_UNUSED1 0x13
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/src/sys/external/isc/libsodium/dist/test/default/ |
auth3.c | 8 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 21 0x11, 0x5b, 0x13, 0x46, 0x90, 0x3d, 0x2e, 0xf4,
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/src/sys/sys/ |
mtio.h | 111 #define MT_ISWTEK5099 0x13 /* WANGTEK 5099ES */ 115 #define MT_ISMT02 0x13 /* Emulex MT02 SCSI tape controller */
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/src/sys/arch/acorn32/include/ |
irqhandler.h | 94 #define IRQ_IRQ6 0x13 103 #define IRQ_IOP3 0x13 167 #define IRQ_DMACH3 0x13
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/src/sys/arch/aarch64/aarch64/ |
start.S | 72 add x13, x9, x10 75 stp x11, x12, [x13, #-16]! 76 cmp x13, x9
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/src/common/lib/libc/arch/aarch64/string/ |
memset.S | 133 add x13, x15, x2 /* get ending address */ 134 asr x13, x13, x9 /* "ending" block numebr */ 135 cmp x13, x12 /* how many blocks? */
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/src/sys/arch/mips/include/ |
cache_r5900.h | 48 #define CACHEOP_R5900_ISDT_D 0x13 /* INDEX STORE DATA */
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/src/sys/arch/sparc/dev/ |
fdreg.h | 83 #define NE7CMD_CFG 0x13
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/src/sys/arch/sparc64/dev/ |
fdcreg.h | 83 #define NE7CMD_CFG 0x13
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/src/sys/dev/i2c/ |
am2315reg.h | 46 #define AM2315_REGISTER_LOW_USER2 0x13
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