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    Searched refs:x139 (Results 1 - 20 of 20) sorted by relevancy

  /src/sys/dev/usb/
if_urlreg.h 110 #define URL_PHYDAT 0x139 /* MII PHY data */
  /src/lib/libform/
form.h 169 #define REQ_NEXT_CHOICE (KEY_MAX + 0x139) /* display next field choice */
171 #define REQ_MAX_COMMAND (KEY_MAX + 0x139) /* must match the last
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
ppsmc.h 130 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
ppsmc.h 127 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
fiji_ppsmc.h 235 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
smu7_ppsmc.h 232 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
tonga_ppsmc.h 259 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/input/
linux-event-codes.h 395 #define BTN_TR2 0x139
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
gmc_7_1_d.h 1214 #define ixMC_IO_DEBUG_EDC_TXPHASE_D1 0x139
gmc_8_1_d.h 1318 #define ixMC_IO_DEBUG_EDC_TXPHASE_D1 0x139
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_enum.h 441 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO2__1BLOCK_2TO1= 0x139,
1641 SC_PA3_SC_EOP_WE = 0x139,
gfx_8_1_enum.h 441 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__1BLOCK_4TO2__1BLOCK_2TO1= 0x139,
1659 SC_PA3_SC_EOP_WE = 0x139,
gfx_7_2_enum.h 1456 SC_PA3_SC_EOP_WE = 0x139,
  /src/sys/lib/libkern/arch/hppa/
milli.S 1361 x139: sh3add %r26,0,%r1 ! sh1add %r1,%r26,%r1 ! b e_2t0a0 ! sh2add %r1,%r26,%r1 label
  /src/sys/arch/sparc64/sparc64/
locore.s 822 STRAP(0x138); STRAP(0x139); STRAP(0x13a); STRAP(0x13b); STRAP(0x13c); STRAP(0x13d); STRAP(0x13e); STRAP(0x13f)
1033 STRAP(0x138); STRAP(0x139); STRAP(0x13a); STRAP(0x13b); STRAP(0x13c); STRAP(0x13d); STRAP(0x13e); STRAP(0x13f)
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_8_0_d.h 1030 #define mmPIXCLK2_RESYNC_CNTL 0x139
dce_10_0_d.h 1189 #define mmPIXCLK2_RESYNC_CNTL 0x139
dce_11_0_d.h 1000 #define mmPIXCLK2_RESYNC_CNTL 0x139
  /src/sys/dev/pci/cxgb/
cxgb_regs.h 4706 #define A_TP_MAC_MATCH_MAP1 0x139
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 1302 #define PUNIT_REG_DDR_SETUP2 0x139

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