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  /src/sys/arch/rs6000/include/
iocc.h 54 #define IOCC_IRR (IOCC_BASE + 0x188) /* intr request reg */
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
dm816.h 30 #define DM816_TIMER7_CLKCTRL DM816_CLKCTRL_INDEX(0x188)
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 153 #define IXPPCI_IRQ_ENABLE (IXP12X0_PCI_VBASE + 0x188)
155 #define IXPPCI_IRQ_ENABLE_SET (IXP12X0_PCI_VBASE + 0x188)
  /src/sys/arch/arm/nvidia/
tegra_ahcisatareg.h 41 #define TEGRA_SATA_INTR_MASK_REG 0x188
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_doorbell.h 142 AMDGPU_VEGA20_DOORBELL64_VCN0_1 = 0x188, /* VNC0 */
152 AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1 = 0x188,
196 AMDGPU_NAVI10_DOORBELL64_VCN0_1 = 0x188, /* lower 32 bits for VNC0 and upper 32 bits for VNC1 */
ppsmc.h 160 #define PPSMC_MSG_OverDriveSetTargetTdp ((uint16_t) 0x188)
  /src/sys/arch/arm/sunxi/
sunxi_can.h 136 #define SUNXI_CAN_RBUF_RBACK2 0x188
  /src/sys/dev/pcmcia/
if_cnwreg.h 101 #define CNW_EREG_STAT_IBEAT 0x188
  /src/sys/arch/arm/footbridge/
dc21285reg.h 333 #define IRQ_ENABLE 0x188
334 #define IRQ_ENABLE_SET 0x188
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 110 #define GPMC_CONFIG3_6 0x188
133 #define GPMC_CONFIG3_6 0x188
  /src/sys/arch/hpcmips/tx/
tx39ioreg.h 40 #define TX39_IOMFIODATADIR_REG 0x188
  /src/sys/arch/sh3/include/
pcicreg.h 79 #define SH4_PCIDTC0 (SH4_PCIC+0x188) /* 32bit */
  /src/sys/dev/pci/
if_nfereg.h 72 #define NFE_STATUS 0x188
cs4281reg.h 140 #define CS4281_FCR2 0x188 /* FIFO Control Register 2 */
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/falcon/
nouveau_nvkm_falcon_v1.c 48 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++);
61 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++);
  /src/tests/lib/libcurses/tests/
std_defines 119 assign KEY_SIC 0x188
  /src/sys/arch/amiga/amiga/
cc_registers.h 222 #define R_COLOR04 0x188
  /src/sys/arch/hpcmips/vr/
icureg.h 301 #define VR4102_MGIUINT_H_REG_W 0x188 /* Level2 Mask GIU intr reg High */
  /src/sys/dev/sbus/
p9100reg.h 144 #define VID_RFPERIOD 0x188 /* refresh period */
  /src/sys/external/bsd/drm2/dist/drm/radeon/
ppsmc.h 157 #define PPSMC_MSG_OverDriveSetTargetTdp ((uint16_t) 0x188)
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 251 0x188 MODE_NITRO /* sdio0_data1 */
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_8_0_d.h 166 #define mmMP_SMUIF4_MP0PUB_IND_INDEX 0x188
203 #define mmMP0PUB_IND_INDEX_4 0x188
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/
sdm660.dtsi 218 <0x0c996800 0x188>;
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/brcm/
bcm7125.dtsi 253 reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
  /src/lib/libcurses/
keyname.c 407 if (key == 0x188) {

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