| /src/sys/arch/sparc/dev/ |
| apcreg.h | 32 #define APC_CPOWER_REG 0x24
|
| /src/sys/arch/evbmips/mipssim/ |
| if_mipsnetreg.h | 49 #define MN_NPORTS 0x24 /* size to map for registers */
|
| /src/sys/arch/i386/pci/ |
| gscpcibreg.h | 36 #define GSCGPIO_CONF 0x24
|
| /src/sys/dev/i2c/ |
| sht4xreg.h | 40 #define SHT4X_MEASURE_HIGH_PRECISION_MEDIUM_HEAT_TENTH_S 0x24
|
| /src/sys/dev/ic/ |
| rng200reg.h | 51 #define RNG200_COUNT 0x24
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/ |
| dmub_fw_meta.h | 38 #define DMUB_FW_META_OFFSET 0x24
|
| /src/sys/external/bsd/drm2/include/video/ |
| mipi_display.h | 41 #define MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM 0x24
|
| /src/sys/dev/pci/ |
| nfsmbreg.h | 36 #define NFORCE_SMB2 0x24
46 #define NFORCE_SMB_BCNT 0x24 /* number of data bytes */
|
| lynxfbreg.h | 42 #define DPR_COLOR_COMPARE_MASK 0x24
|
| /src/sys/arch/arm/nvidia/ |
| tegra_rtcreg.h | 41 #define RTC_MILLI_SECONDS_COUNTDOW_ALARM_REG 0x24
|
| /src/include/ |
| stab.h | 45 #define N_FUN 0x24 /* procedure name */
|
| /src/sys/arch/mips/alchemy/dev/ |
| usbdreg.h | 50 #define USBD_EP0CS 0x24 /* Endpoint 0 control and status */
|
| /src/sys/arch/mips/include/ |
| kdbparam.h | 57 #define kdbisbreak(type) (((type) & MIPS_CR_EXC_CODE) == 0x24)
|
| /src/sys/arch/pmax/stand/common/ |
| getchar.S | 39 lw v0, 0x24(v0) # offset for callv->_getchar
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/dma/ |
| x1000-dma.h | 35 #define X1000_DMA_SMB0_TX 0x24
|
| x1830-dma.h | 34 #define X1830_DMA_SMB0_TX 0x24
|
| /src/sys/dev/wsfont/ |
| term14.h | 70 0x24, /* . . []. . []. . */
71 0x24, /* . . []. . []. . */
72 0x24, /* . . []. . []. . */
85 0x24, /* . . []. . []. . */
86 0x24, /* . . []. . []. . */
88 0x24, /* . . []. . []. . */
90 0x24, /* . . []. . []. . */
91 0x24, /* . . []. . []. . */
113 0x24, /* . . []. . []. . */
120 0x24, /* . . []. . []. . *
[all...] |
| /src/sys/dev/microcode/cyclades-z/ |
| cyzfirm.h | 103 0x42, 0x24, 0x00, 0xa0, 0x01, 0x3c, 0x25, 0x10, 0x41, 0x00,
163 0x42, 0x24, 0xc1, 0x9f, 0x03, 0x3c, 0x9c, 0x22, 0x63, 0x24,
172 0xcc, 0x02, 0x42, 0x24, 0x00, 0xa0, 0x03, 0x3c, 0x25, 0x10,
178 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x42, 0x24, 0xc1, 0x9f,
180 0x24, 0x50, 0x41, 0x01, 0xc0, 0x9f, 0x09, 0x3c, 0x20, 0x03,
183 0x42, 0x24, 0x25, 0xe8, 0x40, 0x00, 0x25, 0x18, 0x40, 0x00,
184 0x00, 0xe0, 0x63, 0x24, 0x00, 0x00, 0x60, 0xac, 0x2b, 0x08,
188 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x0a, 0x3c, 0x24, 0x48,
191 0x02, 0x3c, 0xa0, 0x03, 0x42, 0x24, 0x09, 0xf8, 0x40, 0x00
[all...] |
| /src/sys/arch/powerpc/ibm4xx/dev/ |
| pcicreg.h | 62 #define PCIC_BAR5 0x24
98 #define PCIL_PMM2MA 0x24
|
| /src/sys/dev/microcode/rum/ |
| microcode.h | 32 0x24, 0xc0, 0x60, 0x13, 0x24, 0xc0, 0x60, 0x16, 0x24, 0xc0, 0x60,
33 0x19, 0x24, 0xc0, 0x70, 0x1a, 0xe4, 0x90, 0x00, 0x0b, 0xf0, 0x80,
37 0x02, 0x01, 0xef, 0xf0, 0xd3, 0x22, 0xef, 0x24, 0xc0, 0x60, 0x1f,
38 0x24, 0xc0, 0x60, 0x2e, 0x24, 0xc0, 0x60, 0x3d, 0x24, 0xc0, 0x70,
42 0xfe, 0x90, 0x00, 0x10, 0x80, 0x24, 0x90, 0x00, 0x1b, 0xe0, 0x30,
56 0xe5, 0x40, 0x24, 0xc0, 0x60, 0x14, 0x24, 0xc0, 0x60, 0x18, 0x24
[all...] |
| /src/usr.sbin/tprof/arch/ |
| tprof_x86.c | 393 { "L2_RQSTS.DEMAND_DATA_RD_MISS", 0x24, 0x21, true },
394 { "L2_RQSTS.RFO_MISS", 0x24, 0x22, true },
395 { "L2_RQSTS.CODE_RD_MISS", 0x24, 0x24, true },
396 { "L2_RQSTS.ALL_DEMAND_MISS", 0x24, 0x27, true },
397 { "L2_RQSTS.PF_MISS", 0x24, 0x38, true },
398 { "L2_RQSTS.MISS", 0x24, 0x3f, true },
399 { "L2_RQSTS.DEMAND_DATA_RD_HIT", 0x24, 0x41, true },
400 { "L2_RQSTS.RFO_HIT", 0x24, 0x42, true },
401 { "L2_RQSTS.CODE_RD_HIT", 0x24, 0x44, true }
[all...] |
| /src/sys/arch/acorn32/podulebus/ |
| cscreg.h | 67 #define CSC_FAS_OFFSET_CLKCONV 0x24
|
| /src/sys/arch/arm/ep93xx/ |
| epsmcreg.h | 56 #define EP93XX_PCMCIA0_Common 0x24 /* PCMCIA Common (R/W) */
|
| /src/sys/arch/hpcmips/vr/ |
| vrc4172pcsreg.h | 51 #define VRC2_EXCS4MSKL 0x24
|
| /src/sys/dev/marvell/ |
| mvspireg.h | 53 #define MVSPI_DIRWRITEHD_REG 0x24 /* MVSPI Direct Write Header Register */
|
