/src/sys/arch/ofppc/include/ |
vmparam.h | 13 #define USER_SR 0xe
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/src/lib/libc/gdtoa/ |
gmisc.c | 43 ULong *x, *x1, *xe, y; local in function:rshift 49 xe = x + b->wds; 54 while(x < xe) { 62 while(x < xe) 80 CONST ULong *x, *xe; local in function:trailz 84 xe = x + b->wds; 85 for(n = 0; x < xe && !*x; x++) 87 if (x < xe) {
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sum.c | 44 ULong carry, *xc, *xa, *xb, *xe, y; local in function:sum 60 xe = xc + b->wds; 69 while(xc < xe); 70 xe += a->wds - b->wds; 71 while(xc < xe) { 84 while(xc < xe); 85 xe += a->wds - b->wds; 86 while(xc < xe) {
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hexnan.c | 62 ULong c, h, *x, *x1, *xe; local in function:hexnan 73 x1 = xe = x; 134 while(x <= xe); 136 while(x1 <= xe); 141 *xe &= ((ULong)0xffffffff) >> (ULbits - i); 143 for(x1 = xe;; --x1) {
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smisc.c | 151 ULong *ce, *x, *xe; local in function:copybits 159 xe = x + b->wds; 160 while(x < xe) 165 for(xe = x + (nw - nw1); x < xe; x += 2)
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/src/sys/dev/isa/ |
if_levar.h | 33 #define BICC_RAP 0xe
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if_elreg.h | 28 #define EL_AS 0xe /* Auxiliary status register */ 29 #define EL_AC 0xe /* Auxiliary command register */
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/phy/ |
phy-qcom-qusb2.h | 26 #define QUSB2_V2_HSTX_TRIM_15_6_MA 0xe
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/src/sys/arch/bebox/stand/boot/ |
vreset.c | 92 { 0x3d4, 0xe, 0x00 }, 109 { 0x3ce, 0x6, 0xe }, 137 { 0x3d4, 0xe, 0x00 }, 154 { 0x3ce, 0x6, 0xe }, 239 { 0x4, 0x1a, 0xe }, 248 { 0x3, 0xe, 0x36 }, 264 { 0x38, 0xe, 0x2a }, 273 { 0x13, 0xe, 0x1d }, 288 { 0x8, 0xe, 0xe }, [all...] |
/src/sys/dev/ic/ |
mc146818reg.h | 115 #define MC_NREGS 0xe /* 14 registers; CMOS follows */ 118 #define MC_NVRAM_START 0xe /* start of NVRAM: offset 14 */ 138 #define MC_RATE_4_Hz 0xe /* 250 ms period */
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vgareg.h | 55 #define VGA_GDC_INDEX 0xe
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ds1286reg.h | 122 #define DS1286_NVRAM_START 0xe /* start of NVRAM: offset 14 */
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/pinctrl/ |
dra.h | 29 #define MUX_MODE14 0xe 47 #define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4))
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stm32-pinfunc.h | 27 #define AF13 0xe
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/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
gc_9_4_1_sh_mask.h | 154 #define GDS_EDC_OA_PIPE_CNT__ME1_PIPE3_PIPE_MEM_DED__SHIFT 0xe 175 #define SPI_EDC_CNT__SPI_WB_GRANT_61_DED_COUNT__SHIFT 0xe 198 #define SQC_EDC_CNT2__DATA_BANKA_BANK_RAM_DED_COUNT__SHIFT 0xe 219 #define SQC_EDC_CNT3__DATA_BANKB_BANK_RAM_DED_COUNT__SHIFT 0xe 236 #define SQC_EDC_PARITY_CNT3__DATA_BANKA_MISS_FIFO_DED_COUNT__SHIFT 0xe 269 #define SQC_EDC_CNT__DATA_CU1_UTCL1_LFIFO_DED_COUNT__SHIFT 0xe 325 #define SQ_EDC_CNT__VGPR0_DED_COUNT__SHIFT 0xe 356 #define TA_EDC_CNT__TA_FX_LFIFO_DED_COUNT__SHIFT 0xe 386 #define TCP_EDC_CNT_NEW__VM_FIFO_DED_COUNT__SHIFT 0xe 430 #define TCC_EDC_CNT__LOW_RATE_TAG_DED_COUNT__SHIFT 0xe [all...] |
/src/sys/arch/alpha/include/ |
kbio.h | 89 #define KIOC_SHIFTMASK 0xe
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/src/sys/arch/luna68k/dev/ |
timekeeper.h | 88 #define MC_NREGS 0xe /* 14 registers; CMOS follows */
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/src/sys/dev/bluetooth/ |
bthid.h | 57 #define BTHID_HANDSHAKE_UNKNOWN 0xe
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/dma/ |
x2000-dma.h | 22 #define X2000_DMA_UART3_TX 0xe
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/net/ |
ti-dp83867.h | 36 #define DP83867_RGMIIDCTL_3_75_NS 0xe
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/src/sys/arch/hpcmips/vr/ |
bcureg.h | 174 #define BCUROMSPEED_ATIME_17VT (0xe) /* 17VTClock */ 201 #define BCUIO0SPEED_RDYRW_17VT (0xe) /* 17VTClock */ 219 #define BCUIO0SPEED_RWRDY_13VT (0xe) /* 13VTClock */ 237 #define BCUIO0SPEED_CSRW_15VT (0xe) /* 15VTClock */ 264 #define BCUIO1SPEED_RDYRW_17VT (0xe) /* 17VTClock */ 282 #define BCUIO1SPEED_RWRDY_13VT (0xe) /* 13VTClock */ 300 #define BCUIO1SPEED_CSRW_15VT (0xe) /* 15VTClock */ 384 #define BCU81SPD_WROMA15T (0xe<<0) /* 15TClock */
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/src/sys/arch/arm/amlogic/ |
mesong12a_pinctrl.c | 554 GPIO_MUX_PINCTRL_GROUP("i2c3_sda_a", 0xe, 6, GPIOA_14, 2), 555 GPIO_MUX_PINCTRL_GROUP("i2c3_sck_a", 0xe, 7, GPIOA_15, 2), 556 GPIO_MUX_PINCTRL_GROUP("pdm_din0_a", 0xe, 0, GPIOA_8, 1), 557 GPIO_MUX_PINCTRL_GROUP("pdm_din1_a", 0xe, 1, GPIOA_9, 1), 561 GPIO_MUX_PINCTRL_GROUP("spdif_in_a10", 0xe, 2, GPIOA_10, 1), 562 GPIO_MUX_PINCTRL_GROUP("spdif_in_a12", 0xe, 4, GPIOA_12, 1), 563 GPIO_MUX_PINCTRL_GROUP("spdif_out_a11", 0xe, 3, GPIOA_11, 1), 564 GPIO_MUX_PINCTRL_GROUP("spdif_out_a13", 0xe, 5, GPIOA_13, 1), 577 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_sclk_a", 0xe, 4, GPIOA_12, 3), 578 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_fs_a", 0xe, 5, GPIOA_13, 3) [all...] |
/src/sys/arch/acorn32/mainbus/ |
piocreg.h | 97 #define PIOC_CM_CRE 0xe /* PIOC revision */
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/src/sys/dev/i2c/ |
r2025reg.h | 65 #define R2025_REG_CTRL1 0xe
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tsl256xreg.h | 139 #define TSL256x_REG_DATA1LOW 0xe
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