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  /src/sys/arch/ofppc/include/
vmparam.h 13 #define USER_SR 0xe
  /src/lib/libc/gdtoa/
gmisc.c 43 ULong *x, *x1, *xe, y; local
49 xe = x + b->wds;
54 while(x < xe) {
62 while(x < xe)
80 CONST ULong *x, *xe; local
84 xe = x + b->wds;
85 for(n = 0; x < xe && !*x; x++)
87 if (x < xe) {
sum.c 44 ULong carry, *xc, *xa, *xb, *xe, y; local
60 xe = xc + b->wds;
69 while(xc < xe);
70 xe += a->wds - b->wds;
71 while(xc < xe) {
84 while(xc < xe);
85 xe += a->wds - b->wds;
86 while(xc < xe) {
hexnan.c 62 ULong c, h, *x, *x1, *xe; local
73 x1 = xe = x;
134 while(x <= xe);
136 while(x1 <= xe);
141 *xe &= ((ULong)0xffffffff) >> (ULbits - i);
143 for(x1 = xe;; --x1) {
smisc.c 151 ULong *ce, *x, *xe; local
159 xe = x + b->wds;
160 while(x < xe)
165 for(xe = x + (nw - nw1); x < xe; x += 2)
  /src/sys/dev/isa/
if_levar.h 33 #define BICC_RAP 0xe
if_elreg.h 28 #define EL_AS 0xe /* Auxiliary status register */
29 #define EL_AC 0xe /* Auxiliary command register */
  /src/external/gpl2/groff/dist/src/libs/libgroff/
geometry.cpp 137 int xe = x_1 - xcenter; local
141 if (xe > *maxx)
142 *maxx = xe;
143 else if (xe < *minx)
144 *minx = xe;
154 if (xe >= 0)
160 || ((qs == qe) && (double(xs) * ye < double(xe) * ys)))
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/phy/
phy-qcom-qusb2.h 26 #define QUSB2_V2_HSTX_TRIM_15_6_MA 0xe
  /src/external/gpl3/binutils/dist/opcodes/
ia64-opc-a.c 310 {"cmp.eq", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
311 {"cmp.ne", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
312 {"cmp.eq.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
313 {"cmp.ne.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
314 {"cmp.eq.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
315 {"cmp.ne.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
316 {"cmp.ne.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
317 {"cmp.eq.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
318 {"cmp4.eq", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
319 {"cmp4.ne", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
ia64-opc-a.c 310 {"cmp.eq", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
311 {"cmp.ne", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
312 {"cmp.eq.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
313 {"cmp.ne.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
314 {"cmp.eq.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
315 {"cmp.ne.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
316 {"cmp.ne.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
317 {"cmp.eq.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
318 {"cmp4.eq", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
319 {"cmp4.ne", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
ia64-opc-a.c 310 {"cmp.eq", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
311 {"cmp.ne", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
312 {"cmp.eq.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
313 {"cmp.ne.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
314 {"cmp.eq.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
315 {"cmp.ne.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
316 {"cmp.ne.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
317 {"cmp.eq.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
318 {"cmp4.eq", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
319 {"cmp4.ne", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/lm32/
lm32-sim.h 36 #define LM32_CSR_JTX 0xe
  /src/external/gpl3/gdb/dist/opcodes/
ia64-opc-a.c 310 {"cmp.eq", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
311 {"cmp.ne", A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
312 {"cmp.eq.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
313 {"cmp.ne.unc", A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
314 {"cmp.eq.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
315 {"cmp.ne.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
316 {"cmp.ne.or.andcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
317 {"cmp.eq.and.orcm", A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
318 {"cmp4.eq", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
319 {"cmp4.ne", A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY}
    [all...]
  /src/external/gpl3/gdb/dist/sim/lm32/
lm32-sim.h 36 #define LM32_CSR_JTX 0xe
  /src/sys/arch/bebox/stand/boot/
vreset.c 92 { 0x3d4, 0xe, 0x00 },
109 { 0x3ce, 0x6, 0xe },
137 { 0x3d4, 0xe, 0x00 },
154 { 0x3ce, 0x6, 0xe },
239 { 0x4, 0x1a, 0xe },
248 { 0x3, 0xe, 0x36 },
264 { 0x38, 0xe, 0x2a },
273 { 0x13, 0xe, 0x1d },
288 { 0x8, 0xe, 0xe },
    [all...]
  /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.dwarf2/
dw2-strp.S 83 .uleb128 0xe /* DW_FORM_strp */
111 .uleb128 0xe /* DW_FORM_strp */
123 .uleb128 0xe /* DW_FORM_strp */
127 .uleb128 0xe /* DW_FORM_strp */
159 .uleb128 0xe /* DW_FORM_strp */
  /src/external/lgpl3/mpfr/dist/src/
ubf.c 203 mpz_t xe, ye; local
206 mpfr_init_get_zexp (xe, x);
208 c = mpz_cmp (xe, ye) < 0;
209 mpz_clear (xe);
248 mpz_t xe, ye; local
251 mpfr_init_get_zexp (xe, x);
253 mpz_sub (xe, xe, ye);
255 e = mpfr_ubf_zexp2exp (xe);
256 mpz_clear (xe);
    [all...]
  /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.dwarf2/
dw2-strp.S 83 .uleb128 0xe /* DW_FORM_strp */
111 .uleb128 0xe /* DW_FORM_strp */
123 .uleb128 0xe /* DW_FORM_strp */
127 .uleb128 0xe /* DW_FORM_strp */
159 .uleb128 0xe /* DW_FORM_strp */
  /src/sys/dev/ic/
mc146818reg.h 115 #define MC_NREGS 0xe /* 14 registers; CMOS follows */
118 #define MC_NVRAM_START 0xe /* start of NVRAM: offset 14 */
138 #define MC_RATE_4_Hz 0xe /* 250 ms period */
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/MCTargetDesc/
ARCInfo.h 39 LS = 0xe,
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/pinctrl/
dra.h 29 #define MUX_MODE14 0xe
47 #define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4))
  /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.compile/
compile-constvar.S 52 .uleb128 0xe # (DW_FORM_strp)
56 .uleb128 0xe # (DW_FORM_strp)
58 .uleb128 0xe # (DW_FORM_strp)
65 .uleb128 0xe # (DW_FORM_strp)
  /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.compile/
compile-constvar.S 52 .uleb128 0xe # (DW_FORM_strp)
56 .uleb128 0xe # (DW_FORM_strp)
58 .uleb128 0xe # (DW_FORM_strp)
65 .uleb128 0xe # (DW_FORM_strp)
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_4_1_sh_mask.h 154 #define GDS_EDC_OA_PIPE_CNT__ME1_PIPE3_PIPE_MEM_DED__SHIFT 0xe
175 #define SPI_EDC_CNT__SPI_WB_GRANT_61_DED_COUNT__SHIFT 0xe
198 #define SQC_EDC_CNT2__DATA_BANKA_BANK_RAM_DED_COUNT__SHIFT 0xe
219 #define SQC_EDC_CNT3__DATA_BANKB_BANK_RAM_DED_COUNT__SHIFT 0xe
236 #define SQC_EDC_PARITY_CNT3__DATA_BANKA_MISS_FIFO_DED_COUNT__SHIFT 0xe
269 #define SQC_EDC_CNT__DATA_CU1_UTCL1_LFIFO_DED_COUNT__SHIFT 0xe
325 #define SQ_EDC_CNT__VGPR0_DED_COUNT__SHIFT 0xe
356 #define TA_EDC_CNT__TA_FX_LFIFO_DED_COUNT__SHIFT 0xe
386 #define TCP_EDC_CNT_NEW__VM_FIFO_DED_COUNT__SHIFT 0xe
430 #define TCC_EDC_CNT__LOW_RATE_TAG_DED_COUNT__SHIFT 0xe
    [all...]

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