Searched refs:DEBUG_TCS (Results 1 - 9 of 9) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/dev/
H A Dgen_debug.c78 { "hs", DEBUG_TCS },
79 { "tcs", DEBUG_TCS },
97 [MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
H A Dgen_debug.h78 #define DEBUG_TCS (1ull << 34) macro
/xsrc/external/mit/MesaLib/dist/src/intel/dev/
H A Dintel_debug.c81 { "hs", DEBUG_TCS },
82 { "tcs", DEBUG_TCS },
97 { "shaders", DEBUG_WM | DEBUG_VS | DEBUG_TCS |
109 [MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
H A Dintel_debug.h82 #define DEBUG_TCS (1ull << 34) macro
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_tcs.cpp454 if (unlikely(INTEL_DEBUG & DEBUG_TCS)) {
477 if (unlikely(INTEL_DEBUG & DEBUG_TCS)) {
497 if (unlikely(INTEL_DEBUG & DEBUG_TCS))
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_tcs.cpp371 const bool debug_enabled = INTEL_DEBUG(DEBUG_TCS);
498 if (INTEL_DEBUG(DEBUG_TCS))
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_disk_cache.c49 DEBUG_VS, DEBUG_TCS, DEBUG_TES, DEBUG_GS, DEBUG_WM, DEBUG_CS,
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_disk_cache.c49 DEBUG_VS, DEBUG_TCS, DEBUG_TES, DEBUG_GS, DEBUG_WM, DEBUG_CS,
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_pipeline.c91 [MESA_SHADER_TESS_CTRL] = DEBUG_TCS,

Completed in 13 milliseconds