Searched refs:Dst (Results 1 - 25 of 112) sorted by relevance

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/xsrc/external/mit/glu/dist/src/libtess/
H A Dtessmono.c84 for( ; VertLeq( up->Dst, up->Org ); up = up->Lprev )
86 for( ; VertLeq( up->Org, up->Dst ); up = up->Lnext )
91 if( VertLeq( up->Dst, lo->Org )) {
92 /* up->Dst is on the left. It is safe to form triangles from lo->Org.
97 || EdgeSign( lo->Org, lo->Dst, lo->Lnext->Dst ) <= 0 )) {
104 /* lo->Org is on the left. We can make CCW triangles from up->Dst. */
106 || EdgeSign( up->Dst, up->Org, up->Lprev->Org ) >= 0 )) {
115 /* Now lo->Org == up->Dst == the leftmost vertex. The remaining region
H A Dsweep.c68 * - for each e, e->Dst has been processed, but not e->Org
69 * - each edge e satisfies VertLeq(e->Dst,event) && VertLeq(event,e->Org)
128 if( e1->Dst == event ) {
129 if( e2->Dst == event ) {
134 return EdgeSign( e2->Dst, e1->Org, e2->Org ) <= 0;
136 return EdgeSign( e1->Dst, e2->Org, e1->Org ) >= 0;
138 return EdgeSign( e2->Dst, event, e2->Org ) <= 0;
140 if( e2->Dst == event ) {
141 return EdgeSign( e1->Dst, event, e1->Org ) >= 0;
145 t1 = EdgeEval( e1->Dst, even
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c245 copy_dst_reg(&o->Dst[0].Register, &i->Dst[0].Register);
318 dst_reg = &current->FullInstruction.Dst[0];
413 same_src_dst_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) &&
415 unused_from(ctx, &current->FullInstruction.Dst[0], index))
441 same_dst_reg(&next->FullInstruction.Dst[0], &current->FullInstruction.Dst[0]) &&
443 !same_src_dst_reg(&current->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) )
446 dst_reg1 = &current->FullInstruction.Dst[0];
448 dst_reg2 = &next->FullInstruction.Dst[
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H A Di915_fpc_translate.c314 = inst->Dst[0].Register.WriteMask;
411 get_result_vector( p, &inst->Dst[0] ),
441 get_result_vector( p, &inst->Dst[0]),
502 get_result_vector(p, &inst->Dst[0]),
512 get_result_vector(p, &inst->Dst[0]),
554 get_result_vector(p, &inst->Dst[0]),
564 src0 = get_result_vector(p, &inst->Dst[0]);
567 get_result_vector(p, &inst->Dst[0]),
578 get_result_vector(p, &inst->Dst[0]),
602 get_result_vector(p, &inst->Dst[
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c263 copy_dst_reg(&o->Dst[0].Register, &i->Dst[0].Register);
334 dst_reg = &current->FullInstruction.Dst[0];
435 &current->FullInstruction.Dst[0]) &&
437 unused_from(ctx, &current->FullInstruction.Dst[0], index)) {
466 same_dst_reg(&next->FullInstruction.Dst[0],
467 &current->FullInstruction.Dst[0]) &&
471 &current->FullInstruction.Dst[0])) {
473 dst_reg1 = &current->FullInstruction.Dst[0];
475 dst_reg2 = &next->FullInstruction.Dst[
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H A Di915_fpc_translate.c273 const uint32_t writeMask = inst->Dst[0].Register.WriteMask;
365 i915_emit_texld(p, get_result_vector(p, &inst->Dst[0]),
388 i915_emit_arith(p, opcode, get_result_vector(p, &inst->Dst[0]),
440 i915_emit_arith(p, A0_MOV, get_result_vector(p, &inst->Dst[0]), flags, 0,
448 i915_emit_arith(p, A0_CMP, get_result_vector(p, &inst->Dst[0]),
457 src0 = get_result_vector(p, &inst->Dst[0]);
458 i915_emit_arith(p, A0_MOV, get_result_vector(p, &inst->Dst[0]),
467 i915_emit_arith(p, A0_DP3, get_result_vector(p, &inst->Dst[0]),
489 i915_emit_arith(p, A0_MUL, get_result_vector(p, &inst->Dst[0]),
501 i915_emit_arith(p, A0_EXP, get_result_vector(p, &inst->Dst[
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_emulate.c88 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
89 new_inst.Dst[0].Register.Index = ctx->info.num_outputs;
90 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
123 if (inst->Dst[i].Register.File != TGSI_FILE_OUTPUT ||
124 inst->Dst[i].Register.Indirect)
128 ctx->info.output_semantic_name[inst->Dst[i].Register.Index];
H A Dtgsi_parse.c208 next_token( ctx, &inst->Dst[i].Register );
210 if (inst->Dst[i].Register.Indirect)
211 next_token( ctx, &inst->Dst[i].Indirect );
213 if (inst->Dst[i].Register.Dimension) {
214 next_token( ctx, &inst->Dst[i].Dimension );
219 assert( !inst->Dst[i].Dimension.Dimension );
221 if (inst->Dst[i].Dimension.Indirect)
222 next_token( ctx, &inst->Dst[i].DimIndirect );
H A Dtgsi_transform.h282 inst.Dst[0].Register.File = dst_file,
283 inst.Dst[0].Register.Index = dst_index;
284 inst.Dst[0].Register.WriteMask = dst_writemask;
309 inst.Dst[0].Register.File = dst_file,
310 inst.Dst[0].Register.Index = dst_index;
311 inst.Dst[0].Register.WriteMask = dst_writemask;
339 inst.Dst[0].Register.File = dst_file,
340 inst.Dst[0].Register.Index = dst_index;
341 inst.Dst[0].Register.WriteMask = dst_writemask;
367 inst.Dst[
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H A Dtgsi_lowering.c141 reg_dst(&new_inst.Dst[0], dst, mask);
200 struct tgsi_full_dst_register *dst = &inst->Dst[0];
220 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Y);
232 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Z);
243 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_W);
254 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_X);
281 struct tgsi_full_dst_register *dst = &inst->Dst[0];
292 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW);
304 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW);
331 struct tgsi_full_dst_register *dst = &inst->Dst[
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H A Dtgsi_point_sprite.c256 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_TEMPORARY,
305 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_TEMPORARY,
357 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_OUTPUT, ts->point_pos_out,
383 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_OUTPUT,
430 else if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
431 inst->Dst[0].Register.Index == (int)ts->point_size_out) {
437 inst->Dst[0].Register.File = TGSI_FILE_TEMPORARY;
438 inst->Dst[0].Register.Index = ts->point_size_tmp;
454 else if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
455 inst->Dst[
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H A Dtgsi_exec.c1066 uint writemask = inst->Dst[0].Register.WriteMask;
1079 inst->Dst[0].Register.File) &&
1081 inst->Dst[0].Register.Index) ||
1083 inst->Dst[0].Register.Indirect)) {
1087 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2394 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2395 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2438 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
2439 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X,
2442 if (inst->Dst[
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/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_emulate.c88 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
89 new_inst.Dst[0].Register.Index = ctx->info.num_outputs;
90 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
123 if (inst->Dst[i].Register.File != TGSI_FILE_OUTPUT ||
124 inst->Dst[i].Register.Indirect)
128 ctx->info.output_semantic_name[inst->Dst[i].Register.Index];
H A Dtgsi_parse.c208 next_token( ctx, &inst->Dst[i].Register );
210 if (inst->Dst[i].Register.Indirect)
211 next_token( ctx, &inst->Dst[i].Indirect );
213 if (inst->Dst[i].Register.Dimension) {
214 next_token( ctx, &inst->Dst[i].Dimension );
219 assert( !inst->Dst[i].Dimension.Dimension );
221 if (inst->Dst[i].Dimension.Indirect)
222 next_token( ctx, &inst->Dst[i].DimIndirect );
H A Dtgsi_transform.h300 inst.Dst[0].Register.File = dst_file,
301 inst.Dst[0].Register.Index = dst_index;
302 inst.Dst[0].Register.WriteMask = dst_writemask;
327 inst.Dst[0].Register.File = dst_file,
328 inst.Dst[0].Register.Index = dst_index;
329 inst.Dst[0].Register.WriteMask = dst_writemask;
357 inst.Dst[0].Register.File = dst_file,
358 inst.Dst[0].Register.Index = dst_index;
359 inst.Dst[0].Register.WriteMask = dst_writemask;
385 inst.Dst[
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H A Dtgsi_lowering.c142 reg_dst(&new_inst.Dst[0], dst, mask);
201 struct tgsi_full_dst_register *dst = &inst->Dst[0];
221 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Y);
233 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Z);
244 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_W);
255 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_X);
282 struct tgsi_full_dst_register *dst = &inst->Dst[0];
293 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW);
305 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW);
332 struct tgsi_full_dst_register *dst = &inst->Dst[
[all...]
H A Dtgsi_point_sprite.c256 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_TEMPORARY,
305 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_TEMPORARY,
357 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_OUTPUT, ts->point_pos_out,
383 tgsi_transform_dst_reg(&inst.Dst[0], TGSI_FILE_OUTPUT,
430 else if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
431 inst->Dst[0].Register.Index == (int)ts->point_size_out) {
437 inst->Dst[0].Register.File = TGSI_FILE_TEMPORARY;
438 inst->Dst[0].Register.Index = ts->point_size_tmp;
454 else if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
455 inst->Dst[
[all...]
H A Dtgsi_exec.c2195 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2196 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
2239 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
2240 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
2242 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
2243 store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y);
2254 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2257 &inst->Dst[0], inst, chan);
2260 &inst->Dst[0], inst, chan);
2265 if (inst->Dst[
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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_variable.h46 struct rc_dst_register Dst; member in struct:rc_variable
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_atifs_to_tgsi.c689 current_inst->Dst[0].Register.File == TGSI_FILE_OUTPUT) {
717 inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
718 inst.Dst[0].Register.Index = ctx->fog_factor_temp;
719 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
733 inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
734 inst.Dst[0].Register.Index = ctx->fog_factor_temp;
735 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
744 inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
745 inst.Dst[0].Register.Index = ctx->fog_factor_temp;
746 inst.Dst[
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H A Dst_tgsi_lower_yuv.c265 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ);
274 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_X);
283 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Y);
292 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Z);
301 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_W);
320 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_X);
329 reg_dst(&inst.Dst[0], &ctx->tmp[B].dst, TGSI_WRITEMASK_XY);
334 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_YZ);
339 yuv_to_rgb(tctx, &originst->Dst[0]);
355 reg_dst(&inst.Dst[
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/
H A Dradeon_variable.h46 struct rc_dst_register Dst; member in struct:rc_variable
/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/
H A Dst_tgsi_lower_yuv.c264 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ);
273 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_X);
282 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Y);
291 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Z);
300 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_W);
319 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_X);
328 reg_dst(&inst.Dst[0], &ctx->tmp[B].dst, TGSI_WRITEMASK_XY);
333 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_YZ);
338 yuv_to_rgb(tctx, &originst->Dst[0]);
354 reg_dst(&inst.Dst[
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/
H A Dr300_vs_draw.c251 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
252 new_inst.Dst[0].Register.Index = vsctx->pos_output;
253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
263 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
264 new_inst.Dst[0].Register.Index = vsctx->num_outputs - 1;
265 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
276 struct tgsi_full_dst_register *dst = &inst->Dst[i];
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/
H A Dr300_vs_draw.c251 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
252 new_inst.Dst[0].Register.Index = vsctx->pos_output;
253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
263 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
264 new_inst.Dst[0].Register.Index = vsctx->num_outputs - 1;
265 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
276 struct tgsi_full_dst_register *dst = &inst->Dst[i];

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