| /xsrc/external/mit/xf86-video-intel-old/dist/src/ |
| H A D | i915_video.c | 340 i915_fs_mov_masked(FS_R0, MASK_X, i915_fs_operand_reg(FS_R1)); 341 i915_fs_mov_masked(FS_R0, MASK_Y, i915_fs_operand_reg(FS_R2)); 342 i915_fs_mov_masked(FS_R0, MASK_Z, i915_fs_operand_reg(FS_R3)); 345 i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0), 353 i915_fs_operand_reg(FS_R0), 356 i915_fs_operand_reg(FS_R0), 359 i915_fs_operand_reg(FS_R0),
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| H A D | i915_render.c | 497 i915_fs_texld(FS_R0, FS_S0, FS_T0); 499 i915_fs_texldp(FS_R0, FS_S0, FS_T0); 504 i915_fs_mov_masked(FS_R0, MASK_W, i915_fs_operand_one()); 508 i915_fs_mov(out_reg, i915_fs_operand_reg(FS_R0)); 533 i915_fs_mul(out_reg, i915_fs_operand(FS_R0, W, W, W, W), 536 i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0), 540 i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
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| H A D | i915_3d.h | 41 #define FS_R0 ((REG_TYPE_R << 8) | 0) macro 164 return i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO); 178 return i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE);
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| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i915_video.c | 382 i915_fs_mov_masked(FS_R0, MASK_X, 384 i915_fs_mov_masked(FS_R0, MASK_Y, 386 i915_fs_mov_masked(FS_R0, MASK_Z, 390 i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0), 399 i915_fs_operand_reg(FS_R0), 402 i915_fs_operand_reg(FS_R0), 405 i915_fs_operand_reg(FS_R0),
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| H A D | i915_3d.h | 245 #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) macro 339 #define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) 349 #define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
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| H A D | i915_render.c | 775 src_reg = FS_R0; 792 i915_fs_texld(FS_R0, FS_S0, FS_T0); 794 i915_fs_texldp(FS_R0, FS_S0, FS_T0); 796 src_reg = FS_R0;
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i915_video.c | 382 i915_fs_mov_masked(FS_R0, MASK_X, 384 i915_fs_mov_masked(FS_R0, MASK_Y, 386 i915_fs_mov_masked(FS_R0, MASK_Z, 390 i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0), 399 i915_fs_operand_reg(FS_R0), 402 i915_fs_operand_reg(FS_R0), 405 i915_fs_operand_reg(FS_R0),
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| H A D | i915_3d.h | 245 #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) macro 339 #define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) 349 #define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
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| H A D | i915_render.c | 775 src_reg = FS_R0; 792 i915_fs_texld(FS_R0, FS_S0, FS_T0); 794 i915_fs_texldp(FS_R0, FS_S0, FS_T0); 796 src_reg = FS_R0;
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| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen3_render.h | 1092 #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) macro 1186 #define gen3_fs_operand_zero() gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) 1196 #define gen3_fs_operand_one() gen3_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
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| H A D | gen3_render.c | 1626 gen3_fs_mov(FS_OC, gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ONE)); 1639 src_reg = FS_R0; 1645 gen3_linear_coord(sna, src, FS_T0, FS_R0); 1646 gen3_fs_texld(src_reg, FS_S0, FS_R0); 1650 gen3_radial_coord(sna, src, FS_T0, FS_R0); 1651 gen3_fs_texld(src_reg, FS_S0, FS_R0); 1713 gen3_linear_coord(sna, src, FS_T0, FS_R0); 1714 gen3_fs_texld(FS_R0, FS_S0, FS_R0); 1715 src_reg = FS_R0; [all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen3_render.h | 1092 #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) macro 1186 #define gen3_fs_operand_zero() gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) 1196 #define gen3_fs_operand_one() gen3_fs_operand(FS_R0, ONE, ONE, ONE, ONE)
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| H A D | gen3_render.c | 1602 gen3_fs_mov(FS_OC, gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ONE)); 1615 src_reg = FS_R0; 1621 gen3_linear_coord(sna, src, FS_T0, FS_R0); 1622 gen3_fs_texld(src_reg, FS_S0, FS_R0); 1626 gen3_radial_coord(sna, src, FS_T0, FS_R0); 1627 gen3_fs_texld(src_reg, FS_S0, FS_R0); 1689 gen3_linear_coord(sna, src, FS_T0, FS_R0); 1690 gen3_fs_texld(FS_R0, FS_S0, FS_R0); 1691 src_reg = FS_R0; [all...] |