Searched refs:GPGPU_DISPATCHDIMZ (Results 1 - 7 of 7) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 5013 #define GPGPU_DISPATCHDIMZ 0x2508 macro
5061 mi_store(&b, mi_reg32(GPGPU_DISPATCHDIMZ), size_z);
5283 mi_store(&b, mi_reg32(GPGPU_DISPATCHDIMZ), launch_size[2]);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 3628 #define GPGPU_DISPATCHDIMZ 0x2508 macro
3667 gen_mi_store(&b, gen_mi_reg32(GPGPU_DISPATCHDIMZ), size_z);
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| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| H A D | genX_state_upload.c | 4491 #define GPGPU_DISPATCHDIMZ 0x2508 macro
4504 emit_lrm(brw, GPGPU_DISPATCHDIMZ, ro_bo(bo, indirect_offset + 8));
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| H A D | genX_state_upload.c | 4420 #define GPGPU_DISPATCHDIMZ 0x2508 macro
4433 emit_lrm(brw, GPGPU_DISPATCHDIMZ, ro_bo(bo, indirect_offset + 8));
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 5554 #define GPGPU_DISPATCHDIMZ 0x2508 macro
5568 lrm.RegisterAddress = GPGPU_DISPATCHDIMZ;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 6882 #define GPGPU_DISPATCHDIMZ 0x2508 macro
6897 lrm.RegisterAddress = GPGPU_DISPATCHDIMZ;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/ |
| H A D | crocus_state.c | 8182 #define GPGPU_DISPATCHDIMZ 0x2508 macro
8196 lrm.RegisterAddress = GPGPU_DISPATCHDIMZ;
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