Searched refs:HDCPipelineFlushEnable (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_cmd_buffer.c61 bits |= (pc->HDCPipelineFlushEnable) ? ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0;
109 pc.HDCPipelineFlushEnable = true;
124 pc.HDCPipelineFlushEnable = true;
2216 pipe.HDCPipelineFlushEnable |= bits & ANV_PIPE_HDC_PIPELINE_FLUSH_BIT;
5445 pc.HDCPipelineFlushEnable = true;
/xsrc/external/mit/MesaLib/src/intel/genxml/
H A Dgen11_pack.h10420 bool HDCPipelineFlushEnable; member in struct:GFX11_PIPE_CONTROL
10470 __gen_uint(values->HDCPipelineFlushEnable, 9, 9) |
H A Dgen125_pack.h10916 bool HDCPipelineFlushEnable; member in struct:GFX125_PIPE_CONTROL
10970 __gen_uint(values->HDCPipelineFlushEnable, 9, 9) |
H A Dgen12_pack.h11261 bool HDCPipelineFlushEnable; member in struct:GFX12_PIPE_CONTROL
11315 __gen_uint(values->HDCPipelineFlushEnable, 9, 9) |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_state.c7848 pc.HDCPipelineFlushEnable = flags & PIPE_CONTROL_FLUSH_HDC;

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