Searched refs:LVDS (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/xf86-video-nv/dist/src/
H A Dg80_type.h36 LVDS, enumerator in enum:PanelType
H A Dg80_sor.c114 if(pPriv->panelType == LVDS)
154 /* If LVDS has an I2C port, use the normal probe routine to get the
159 /* Ignore G80SorDetect and assume LVDS is always connected */
377 if(scale == G80_SCALE_OFF && pPriv->panelType == LVDS)
378 // LVDS requires scaling
493 if(panelType == LVDS) {
494 strcpy(orName, "LVDS");
501 "Failed to find LVDS native mode\n");
H A Dnv_type.h177 Bool LVDS; member in struct:__anonce19071b0208
H A Dnv_setup.c755 pNv->LVDS = FALSE;
759 pNv->LVDS = TRUE;
761 pNv->LVDS ? "LVDS" : "TMDS");
H A Dg80_output.c177 case 3: /* LVDS */
183 xf86DrvMsg(scrnIndex, X_INFO, "LVDS has no I2C port\n");
188 "LVDS: invalid port %d\n", port);
196 "LVDS: invalid port type %d\n", portType);
201 "LVDS: unrecognized port %d\n", port);
224 xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> SOR%i (LVDS)\n", pNv->lvds.i2cPort, pNv->lvds.or);
226 xf86DrvMsg(scrnIndex, X_PROBED, " [N/A] -> SOR%i (LVDS)\n", pNv->lvds.or);
494 xf86OutputPtr lvds = G80CreateSor(pScrn, pNv->lvds.or, LVDS);
504 snprintf(i2cName, sizeof(i2cName), "I2C%i (LVDS)", pNv->lvds.i2cPort);
508 "Failed to initialize I2C for port %i (LVDS)!\
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H A Dnv_driver.c2324 if(pNv->LVDS) {
/xsrc/external/mit/libdrm/dist/man/
H A DdrmModeGetResources.3.rst61 from the chassis (e.g., LVDS or eDP). Connectors are attached to
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_display.c416 if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) {
417 /* LVDS with dual channel */
419 } else /* LVDS with single channel */
583 /* For LVDS, if the panel is on, just rely on its current settings for
587 if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
643 /* For LVDS, if the panel is on, just rely on its current settings for
647 if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
1759 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
1765 uint32_t lvds = INREG(LVDS);
1803 OUTREG(LVDS, lvd
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H A Di830_debug.c329 mode = "LVDS";
334 Bool is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B);
337 mode = "LVDS";
340 if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
657 DEFINEREG2(LVDS, i830_debug_lvds),
1051 mode = "LVDS";
1057 mode = "Non-LVDS";
1600 uint32_t lvds = INREG(LVDS);
1671 uint32_t lvds = INREG(LVDS);
1689 xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "LVDS P
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H A Di830_lvds.c496 * controller for example), so on them, when turning LVDS back on,
537 /* XXX: We never power down the LVDS pairs. */
621 "Can't enable LVDS and another output on the same "
629 "Can't support LVDS on pipe A\n");
698 * LVDS borders are enabled (see i830_display.c).
898 * PFIT must be enabled/disabled while LVDS is on but pipes are still off
905 * Detect the LVDS connection.
910 /* Fallback to origin, mark LVDS always connected.
913 * get a reliable way for LVDS detect.
972 /* Our LVDS scale
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H A Di830_driver.c653 /* Set up integrated LVDS */
1866 pI830->saveLVDS = INREG(LVDS);
1914 OUTREG(LVDS, pI830->saveLVDS);
2461 * If an LVDS display is present, swap the plane/pipe mappings so we can
H A Di810_reg.h904 * - LVDS/DVOB/DVOC on
979 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
1408 /** @defgroup LVDS
1412 * This register controls the LVDS output enable, pipe selection, and data
1417 #define LVDS 0x61180 macro
1419 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
1420 * the DPLL semantics change when the LVDS is assigned to that pipe.
1423 /** Selects pipe B for LVDS data. Must be set on pre-965. */
1478 * Tri-state the LVDS buffers when powered down, otherwise
1543 * Overridden by global LVDS powe
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/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h904 * - LVDS/DVOB/DVOC on
979 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
1408 /** @defgroup LVDS
1412 * This register controls the LVDS output enable, pipe selection, and data
1417 #define LVDS 0x61180 macro
1419 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
1420 * the DPLL semantics change when the LVDS is assigned to that pipe.
1423 /** Selects pipe B for LVDS data. Must be set on pre-965. */
1478 * Tri-state the LVDS buffers when powered down, otherwise
1543 * Overridden by global LVDS powe
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h904 * - LVDS/DVOB/DVOC on
979 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
1408 /** @defgroup LVDS
1412 * This register controls the LVDS output enable, pipe selection, and data
1417 #define LVDS 0x61180 macro
1419 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
1420 * the DPLL semantics change when the LVDS is assigned to that pipe.
1423 /** Selects pipe B for LVDS data. Must be set on pre-965. */
1478 * Tri-state the LVDS buffers when powered down, otherwise
1543 * Overridden by global LVDS powe
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