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    Searched refs:PIPE_CONTROL_CACHE_FLUSH_BITS (Results 1 - 12 of 12) sorted by relevancy

  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
iris_pipe_control.c 60 if ((flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
73 iris_emit_end_of_pipe_sync(batch, flags & PIPE_CONTROL_CACHE_FLUSH_BITS);
74 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL);
iris_context.h 219 #define PIPE_CONTROL_CACHE_FLUSH_BITS \
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
iris_pipe_control.c 62 if ((flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
76 flags & PIPE_CONTROL_CACHE_FLUSH_BITS);
77 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL);
187 const uint32_t all_flush_bits = (PIPE_CONTROL_CACHE_FLUSH_BITS |
274 if (bits & PIPE_CONTROL_CACHE_FLUSH_BITS)
iris_context.h 343 #define PIPE_CONTROL_CACHE_FLUSH_BITS \
iris_state.c 7401 if ((flags & (PIPE_CONTROL_CACHE_FLUSH_BITS |
  /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
gen8_multisample_state.c 67 PIPE_CONTROL_CACHE_FLUSH_BITS |
brw_pipe_control.c 42 (flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
55 brw_emit_end_of_pipe_sync(brw, (flags & PIPE_CONTROL_CACHE_FLUSH_BITS));
56 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL);
brw_pipe_control.h 68 #define PIPE_CONTROL_CACHE_FLUSH_BITS \
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
crocus_pipe_control.c 65 (flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
79 flags & PIPE_CONTROL_CACHE_FLUSH_BITS);
80 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL);
crocus_context.h 262 #define PIPE_CONTROL_CACHE_FLUSH_BITS \
  /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
brw_pipe_control.c 42 (flags & PIPE_CONTROL_CACHE_FLUSH_BITS) &&
55 brw_emit_end_of_pipe_sync(brw, (flags & PIPE_CONTROL_CACHE_FLUSH_BITS));
56 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL);
brw_pipe_control.h 68 #define PIPE_CONTROL_CACHE_FLUSH_BITS \

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