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    Searched refs:PIPE_CONTROL_DEPTH_CACHE_FLUSH (Results 1 - 25 of 37) sorted by relevancy

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  /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
brw_pipe_control.h 65 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24),
69 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \
gfx8_depth_state.c 152 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
166 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
genX_pipe_control.c 163 PIPE_CONTROL_DEPTH_CACHE_FLUSH)));
182 if (GFX_VERx10 < 75 && (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) {
364 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
452 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
484 pc.DepthCacheFlushEnable = flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH;
brw_pipe_control.c 106 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH);
366 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
brw_misc_state.c 532 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
783 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
brw_blorp.c 1595 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
1620 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
1653 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
1670 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
  /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
brw_pipe_control.h 65 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24),
69 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \
gen8_depth_state.c 152 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
166 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
genX_pipe_control.c 161 PIPE_CONTROL_DEPTH_CACHE_FLUSH)));
180 if (GEN_VERSIONx10 < 75 && (flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) {
360 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
448 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
480 pc.DepthCacheFlushEnable = flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH;
brw_pipe_control.c 106 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH);
362 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
brw_misc_state.c 533 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
694 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
intel_tex.c 313 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
crocus_pipe_control.c 131 crocus_emit_pipe_control_flush(batch, "depth stall", PIPE_CONTROL_DEPTH_CACHE_FLUSH);
219 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
286 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
312 (flags == 1 ? PIPE_CONTROL_DEPTH_CACHE_FLUSH : 0) |
crocus_fine_fence.c 76 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
crocus_resolve.c 421 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
669 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
674 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
724 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
crocus_context.h 258 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24),
263 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | \
crocus_monitor.c 126 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
iris_pipe_control.c 192 [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH,
200 [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH,
297 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
318 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
iris_fine_fence.c 70 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
iris_context.h 338 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24),
344 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | \
  /xsrc/external/mit/xf86-video-intel/dist/src/sna/
sna_reg.h 81 #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
  /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
sna_reg.h 81 #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
iris_pipe_control.c 159 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
iris_context.h 216 PIPE_CONTROL_DEPTH_CACHE_FLUSH = (1 << 24),
220 (PIPE_CONTROL_DEPTH_CACHE_FLUSH | \
iris_resolve.c 342 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
625 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
662 PIPE_CONTROL_DEPTH_CACHE_FLUSH |

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