Searched refs:PIPE_CONTROL_VF_CACHE_INVALIDATE (Results 1 - 25 of 27) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_pipe_control.h61 PIPE_CONTROL_VF_CACHE_INVALIDATE = (1 << 20), enumerator in enum:pipe_control_flags
74 PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
H A DgenX_pipe_control.c107 if (GEN_GEN == 9 && (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
139 if (IS_GEN_BETWEEN(8, 10) && (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
483 pc.VFCacheInvalidationEnable = flags & PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Dbrw_pipe_control.c363 PIPE_CONTROL_VF_CACHE_INVALIDATE |
H A DgenX_blorp_exec.c224 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL);
H A Dbrw_program.c319 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A DgenX_state_upload.c445 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL);
457 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_pipe_control.h61 PIPE_CONTROL_VF_CACHE_INVALIDATE = (1 << 20), enumerator in enum:pipe_control_flags
74 PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
H A DgenX_pipe_control.c107 if (GFX_VER == 9 && (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
140 (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
487 pc.VFCacheInvalidationEnable = flags & PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Dbrw_pipe_control.c367 PIPE_CONTROL_VF_CACHE_INVALIDATE |
H A DgenX_blorp_exec.c242 brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL);
H A Dbrw_program.c358 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_pipe_control.c220 PIPE_CONTROL_VF_CACHE_INVALIDATE |
288 PIPE_CONTROL_VF_CACHE_INVALIDATE |
343 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Dcrocus_context.h254 PIPE_CONTROL_VF_CACHE_INVALIDATE = (1 << 20), enumerator in enum:pipe_control_flags
270 PIPE_CONTROL_VF_CACHE_INVALIDATE | \
H A Dcrocus_monitor.c127 PIPE_CONTROL_VF_CACHE_INVALIDATE |
H A Dcrocus_resource.c1831 flush |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_pipe_control.c203 [IRIS_DOMAIN_VF_READ] = PIPE_CONTROL_VF_CACHE_INVALIDATE,
300 PIPE_CONTROL_VF_CACHE_INVALIDATE |
346 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Diris_context.h334 PIPE_CONTROL_VF_CACHE_INVALIDATE = (1 << 20), enumerator in enum:pipe_control_flags
352 PIPE_CONTROL_VF_CACHE_INVALIDATE | \
H A Diris_blorp.c231 PIPE_CONTROL_VF_CACHE_INVALIDATE |
H A Diris_state.c3736 if (flush & PIPE_CONTROL_VF_CACHE_INVALIDATE)
6443 flush_flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE |
6724 PIPE_CONTROL_VF_CACHE_INVALIDATE |
7420 if ((flags & PIPE_CONTROL_VF_CACHE_INVALIDATE))
7495 if (GFX_VER == 9 && (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
7546 if (GFX_VER < 11 && flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) {
7816 (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) ? "VF " : "",
7870 flags & PIPE_CONTROL_VF_CACHE_INVALIDATE;
7872 pc.VFCacheInvalidationEnable = flags & PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Diris_resource.c2552 flush |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_pipe_control.c183 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Diris_context.h212 PIPE_CONTROL_VF_CACHE_INVALIDATE = (1 << 20), enumerator in enum:pipe_control_flags
227 PIPE_CONTROL_VF_CACHE_INVALIDATE | \
H A Diris_blorp.c219 iris_emit_pipe_control_flush(batch, PIPE_CONTROL_VF_CACHE_INVALIDATE |
H A Diris_state.c5115 flush_flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE |
5320 iris_emit_pipe_control_flush(batch, PIPE_CONTROL_VF_CACHE_INVALIDATE |
5962 if (GEN_GEN == 9 && (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE)) {
6004 if (GEN_GEN < 11 && flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) {
6293 pc.VFCacheInvalidationEnable = flags & PIPE_CONTROL_VF_CACHE_INVALIDATE;
H A Diris_resource.c1553 flush |= PIPE_CONTROL_VF_CACHE_INVALIDATE;

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