Searched refs:RADEON_TEX_BLEND_0_ENABLE (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/
H A Dr200_blit.c169 RADEON_TEX_BLEND_0_ENABLE));
190 RADEON_TEX_BLEND_0_ENABLE));
220 RADEON_TEX_BLEND_0_ENABLE |
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/
H A Dr200_blit.c156 RADEON_TEX_BLEND_0_ENABLE));
180 RADEON_TEX_BLEND_0_ENABLE));
210 RADEON_TEX_BLEND_0_ENABLE |
/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_render.c535 RADEON_TEX_BLEND_0_ENABLE);
583 RADEON_TEX_BLEND_0_ENABLE);
876 RADEON_TEX_BLEND_0_ENABLE);
925 RADEON_TEX_BLEND_0_ENABLE);
H A Dradeon_textured_videofuncs.c222 OUT_ACCEL_REG(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE |
310 OUT_ACCEL_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
725 RADEON_TEX_BLEND_0_ENABLE |
883 RADEON_TEX_BLEND_0_ENABLE | RADEON_TEX_BLEND_1_ENABLE |
H A Dradeon_exa_render.c680 pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
1053 pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
H A Dradeon_reg.h1749 # define RADEON_TEX_BLEND_0_ENABLE (1 << 12) macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.c135 OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
H A Dradeon_texstate.c1014 (RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE) << unit;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.c126 OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
H A Dradeon_texstate.c1007 (RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE) << unit;
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_textured_videofuncs.c144 OUT_RING_REG(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE |
232 OUT_RING_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
552 RADEON_TEX_BLEND_0_ENABLE |
710 RADEON_TEX_BLEND_0_ENABLE | RADEON_TEX_BLEND_1_ENABLE |
H A Dradeon_exa_render.c631 pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
993 pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
H A Dradeon_reg.h1749 # define RADEON_TEX_BLEND_0_ENABLE (1 << 12) macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h1152 # define RADEON_TEX_BLEND_0_ENABLE (1 << 12) macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/server/
H A Dradeon_reg.h1152 # define RADEON_TEX_BLEND_0_ENABLE (1 << 12) macro

Completed in 72 milliseconds