Searched refs:REG_TYPE_OC (Results 1 - 25 of 34) sorted by relevance

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/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h25 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
H A Di915_xvmc.c171 dest = UREG(REG_TYPE_OC, 0);
204 dest = UREG(REG_TYPE_OC, 0);
236 dest = UREG(REG_TYPE_OC, 0);
297 dest = UREG(REG_TYPE_OC, 0);
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h25 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
H A Di915_xvmc.c171 dest = UREG(REG_TYPE_OC, 0);
204 dest = UREG(REG_TYPE_OC, 0);
236 dest = UREG(REG_TYPE_OC, 0);
297 dest = UREG(REG_TYPE_OC, 0);
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h25 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c136 case REG_TYPE_OC:
H A Di915_program.c255 (GET_UREG_TYPE(coord) != REG_TYPE_OC) &&
268 if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
H A Di915_fragprog.c171 src = UREG(REG_TYPE_OC, 0);
223 return UREG(REG_TYPE_OC, 0);
400 UREG(REG_TYPE_OC, 0),
H A Di915_reg.h391 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_debug_fp.c139 case REG_TYPE_OC:
H A Di915_program.c255 (GET_UREG_TYPE(coord) != REG_TYPE_OC) &&
268 if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
H A Di915_fragprog.c171 src = UREG(REG_TYPE_OC, 0);
223 return UREG(REG_TYPE_OC, 0);
400 UREG(REG_TYPE_OC, 0),
H A Di915_reg.h391 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h57 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
280 #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h57 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
280 #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_state_emit.c398 OUT_BATCH(A0_MOV | (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
399 A0_DEST_CHANNEL_ALL | (REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) |
H A Di915_debug_fp.c92 case REG_TYPE_OC:
H A Di915_fpc_emit.c237 if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_debug_fp.c151 case REG_TYPE_OC:
H A Di915_state_emit.c470 (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
472 (REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) |
H A Di915_fpc_emit.c247 if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
H A Di915_fpc_translate.c72 (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
292 return UREG(REG_TYPE_OC, 0);
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_3d.h76 #define FS_OC ((REG_TYPE_OC << 8) | 0)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h510 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
904 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
1127 #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h510 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
904 #define REG_TYPE_OC 4 /* output color (rgba) */ macro
1127 #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0)

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