Searched refs:REG_Z (Results 1 - 4 of 4) sorted by relevance
| /xsrc/external/mit/xf86-video-intel/dist/src/uxa/ |
| H A D | i915_3d.h | 302 #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) macro
412 i915_get_hardware_channel_val(REG_Z(operand0), \
427 OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \
442 i915_get_hardware_channel_val(REG_Z(operand2), \
465 i915_get_hardware_channel_val(REG_Z(operand0), \
480 OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \
495 i915_get_hardware_channel_val(REG_Z(operand2), \
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/ |
| H A D | i915_3d.h | 302 #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) macro
412 i915_get_hardware_channel_val(REG_Z(operand0), \
427 OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \
442 i915_get_hardware_channel_val(REG_Z(operand2), \
465 i915_get_hardware_channel_val(REG_Z(operand0), \
480 OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \
495 i915_get_hardware_channel_val(REG_Z(operand2), \
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| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| H A D | gen3_render.h | 1149 #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) macro
1259 gen3_get_hardware_channel_val(REG_Z(operand0), \
1274 OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \
1289 gen3_get_hardware_channel_val(REG_Z(operand2), \
1312 gen3_get_hardware_channel_val(REG_Z(operand0), \
1327 OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \
1342 gen3_get_hardware_channel_val(REG_Z(operand2), \
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| H A D | gen3_render.h | 1149 #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) macro
1259 gen3_get_hardware_channel_val(REG_Z(operand0), \
1274 OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \
1289 gen3_get_hardware_channel_val(REG_Z(operand2), \
1312 gen3_get_hardware_channel_val(REG_Z(operand0), \
1327 OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \
1342 gen3_get_hardware_channel_val(REG_Z(operand2), \
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Completed in 43 milliseconds