Searched refs:SI_GS_PER_ES (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_pipe.h53 #define SI_GS_PER_ES 128 macro
H A Dsi_state_draw.c523 SI_GS_PER_ES / primgroup_size >= sctx->screen->gs_table_depth - 3)
H A Dsi_state.c4957 si_pm4_set_reg(pm4, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES);
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_private.h1366 #define SI_GS_PER_ES 128 macro
H A Dsi_cmd_buffer.c183 radeon_set_context_reg(cs, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES);
H A Dradv_pipeline.c3532 if (SI_GS_PER_ES / ia_multi_vgt_param.primgroup_size >= pipeline->device->gs_table_depth - 3)
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dsi_cmd_buffer.c207 radeon_set_context_reg(cs, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES);
H A Dradv_private.h1743 #define SI_GS_PER_ES 128 macro
H A Dradv_pipeline.c1407 if (SI_GS_PER_ES / ia_multi_vgt_param.primgroup_size >= pipeline->device->gs_table_depth - 3)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_pipe.h60 #define SI_GS_PER_ES 128 macro
H A Dsi_state_draw.cpp1012 SI_GS_PER_ES / primgroup_size >= sctx->screen->gs_table_depth - 3)
H A Dsi_state.c5435 si_pm4_set_reg(pm4, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES);

Completed in 57 milliseconds