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    Searched refs:SR07 (Results 1 - 9 of 9) sorted by relevancy

  /xsrc/external/mit/xf86-video-cirrus/dist/src/
alp.h 19 SR07,
lg.h 32 SR07,
alp_driver.c 1138 pCir->chip.alp->ModeReg.ExtVga[SR07] = pCir->chip.alp->SavedReg.ExtVga[SR07] = hwp->readSeq(hwp, 0x07);
1180 hwp->writeSeq(hwp, 0x07, cirReg->ExtVga[SR07]);
1308 pCir->chip.alp->ModeReg.ExtVga[SR07] &= 0xe0;
1324 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x10;
1327 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x11;
1330 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x17;
1333 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x17;
1337 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x19;
1341 pCir->chip.alp->ModeReg.ExtVga[SR07] |= 0x17
    [all...]
lg_driver.c 1051 pCir->chip.lg->ModeReg.ExtVga[SR07] =
1052 pCir->chip.lg->SavedReg.ExtVga[SR07] = hwp->readSeq(hwp, 0x07);
1533 hwp->writeSeq(hwp, 0x07, lgReg->ExtVga[SR07]);
  /xsrc/external/mit/xf86-video-tseng/dist/src/
tseng.h 78 CARD8 SR06, SR07;
tseng_mode.c 1089 tsengReg->SR07 = hwp->readSeq(hwp, 0x07) | 0x14;
1199 hwp->writeSeq(hwp, 0x07, tsengReg->SR07);
1323 new->SR07 = 0xBC;
1466 new->SR07 = (new->SR07 & 0xBE);
  /xsrc/external/mit/xf86-video-xgi/dist/src/
vb_struct.h 488 UCHAR SR07;
vb_init.c 366 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x07, pVBInfo->SR07);
3109 pVBInfo->SR07 = pVideoMemory[0x74];
vb_setmode.c 336 pVBInfo->SR07 = XGI330_SR07;
4386 UCHAR SR01 = 0, SR1F = 0, SR07 = 0, SR06 = 0;
4418 SR07 = (UCHAR) XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x07);
4419 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x07, (UCHAR) (SR07 & 0xFB));

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