Searched refs:SetIndexRegMask (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-ast/dist/src/
H A Dast_mode.c737 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00);
784 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00);
789 SetIndexRegMask(CRTC_PORT,0x00, 0x00, (UCHAR) usTemp);
792 SetIndexRegMask(CRTC_PORT,0x01, 0x00, (UCHAR) usTemp);
795 SetIndexRegMask(CRTC_PORT,0x02, 0x00, (UCHAR) usTemp);
799 SetIndexRegMask(CRTC_PORT,0x03, 0xE0, (UCHAR) (usTemp & 0x1F));
802 SetIndexRegMask(CRTC_PORT,0x04, 0x00, (UCHAR) (usTemp));
805 SetIndexRegMask(CRTC_PORT,0x05, 0x60, (UCHAR) ((usTemp & 0x1F) | jReg05));
807 SetIndexRegMask(CRTC_PORT,0xAC, 0x00, (UCHAR) jRegAC);
808 SetIndexRegMask(CRTC_POR
[all...]
H A Dast_2dtool.c263 SetIndexRegMask(CRTC_PORT, 0xA4, 0xFE, 0x01); /* enable 2D */
295 SetIndexRegMask(CRTC_PORT, 0xA4, 0xFE, 0x01);
300 SetIndexRegMask(CRTC_PORT, 0xA4, 0xFE, 0x00);
H A Dast_vgatool.c109 SetIndexRegMask(CRTC_PORT, 0x9B, 0x00, SendACK);
119 SetIndexRegMask(CRTC_PORT, 0x9B, 0x00, SendACK);
162 SetIndexRegMask(CRTC_PORT, 0x9B, ~0x40, 0x40);
169 SetIndexRegMask(CRTC_PORT, 0x9B, ~0x40, 0x00);
180 SetIndexRegMask(CRTC_PORT, 0x9a, 0x00, data);
205 SetIndexRegMask(CRTC_PORT, 0x9a, 0x00, data);
414 SetIndexRegMask(CRTC_PORT,0xA1, 0xFF, 0x04);
418 SetIndexRegMask(CRTC_PORT,0xA2, 0xFF, 0x80);
782 SetIndexRegMask(SEQ_PORT,0x01, 0xDF, 0x20);
800 SetIndexRegMask(SEQ_POR
[all...]
H A Dast_cursor.c159 SetIndexRegMask(CRTC_PORT, 0xCB, 0xFC, jReg); /* enable mono */
168 SetIndexRegMask(CRTC_PORT, 0xCB, 0xFC, 0x00); /* disable HWC */
443 SetIndexRegMask(CRTC_PORT, 0xCB, 0xFF, 0x00); /* dummy write to fire HWC */
H A Dast_vgatool.h69 #define SetIndexRegMask(base,index, and, val) { \ macro
H A Dast_driver.c1472 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00);

Completed in 10 milliseconds