Searched refs:VGA_CRTC_DATA_OFFSET (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/xf86-video-nv/dist/src/
H A Driva_setup.c39 VGA_WR08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
45 return (VGA_RD08(pRiva->riva.PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
H A Dnv_setup.c45 VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
51 return (VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
/xsrc/external/mit/xf86-video-siliconmotion/dist/src/
H A Dsmilynx_hw.c47 int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
161 int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
334 int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
613 int vgaCRReg = hwp->IOBase + VGA_CRTC_DATA_OFFSET;
H A Dsmilynx_crtc.c270 int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
364 int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/vgahw/
H A DvgaHW.h59 #define VGA_CRTC_DATA_OFFSET 0x05 macro
H A DvgaHW.c167 outb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET, value);
174 return inb(hwp->IOBase + hwp->PIOOffset + VGA_CRTC_DATA_OFFSET);
374 moutb(hwp->IOBase + VGA_CRTC_DATA_OFFSET, value);
381 return minb(hwp->IOBase + VGA_CRTC_DATA_OFFSET);
/xsrc/external/mit/xorg-server/dist/hw/xfree86/vgahw/
H A DvgaHW.h58 #define VGA_CRTC_DATA_OFFSET 0x05 macro
H A DvgaHW.c165 pci_io_write8(hwp->io, hwp->IOBase + VGA_CRTC_DATA_OFFSET, value);
172 return pci_io_read8(hwp->io, hwp->IOBase + VGA_CRTC_DATA_OFFSET);
373 moutb(hwp->IOBase + VGA_CRTC_DATA_OFFSET, value);
380 return minb(hwp->IOBase + VGA_CRTC_DATA_OFFSET);
/xsrc/external/mit/xf86-video-cirrus/dist/src/
H A Dalp_driver.c2168 data = hwp->IOBase + VGA_CRTC_DATA_OFFSET;
2184 data = hwp->IOBase + VGA_CRTC_DATA_OFFSET;
/xsrc/external/mit/xf86-video-vesa/dist/src/
H A Dvesa.c1538 outb(pVesa->ioBase + (VGA_IOBASE_COLOR + VGA_CRTC_DATA_OFFSET), value)

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