Searched refs:bank (Results 1 - 25 of 51) sorted by relevance

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/xsrc/external/mit/xf86-video-chips/dist/src/
H A Dct_bank.c67 CHIPSSetRead(ScreenPtr pScreen, int bank) argument
71 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10));
74 /* Must drain StrongARM write buffer on bank switch! */
75 if (bank != ChipsBank(pScreen)) {
77 ChipsBank(pScreen) = bank;
86 CHIPSSetWrite(ScreenPtr pScreen, int bank) argument
90 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11));
93 /* Must drain StrongARM write buffer on bank switch! */
94 if (bank != ChipsBank(pScreen)) {
96 ChipsBank(pScreen) = bank;
105 CHIPSSetReadWrite(ScreenPtr pScreen,int bank) argument
124 CHIPSSetReadPlanar(ScreenPtr pScreen,int bank) argument
142 CHIPSSetWritePlanar(ScreenPtr pScreen,int bank) argument
160 CHIPSSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
179 CHIPSWINSetRead(ScreenPtr pScreen,int bank) argument
202 CHIPSWINSetWrite(ScreenPtr pScreen,int bank) argument
224 CHIPSWINSetReadWrite(ScreenPtr pScreen,int bank) argument
248 CHIPSWINSetReadPlanar(ScreenPtr pScreen,int bank) argument
270 CHIPSWINSetWritePlanar(ScreenPtr pScreen,int bank) argument
292 CHIPSWINSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
316 CHIPSHiQVSetReadWrite(ScreenPtr pScreen,int bank) argument
334 CHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
354 CHIPSSetRead(ScreenPtr pScreen,int bank) argument
373 CHIPSSetWrite(ScreenPtr pScreen,int bank) argument
392 CHIPSSetReadWrite(ScreenPtr pScreen,int bank) argument
411 CHIPSSetReadPlanar(ScreenPtr pScreen,int bank) argument
429 CHIPSSetWritePlanar(ScreenPtr pScreen,int bank) argument
447 CHIPSSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
466 CHIPSWINSetRead(ScreenPtr pScreen,int bank) argument
488 CHIPSWINSetWrite(ScreenPtr pScreen,int bank) argument
509 CHIPSWINSetReadWrite(ScreenPtr pScreen,int bank) argument
531 CHIPSWINSetReadPlanar(ScreenPtr pScreen,int bank) argument
552 CHIPSWINSetWritePlanar(ScreenPtr pScreen,int bank) argument
573 CHIPSWINSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
595 CHIPSHiQVSetReadWrite(ScreenPtr pScreen,int bank) argument
613 CHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen,int bank) argument
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H A Dct_driver.h402 int CHIPSSetRead(ScreenPtr pScreen, int bank);
403 int CHIPSSetWrite(ScreenPtr pScreen, int bank);
404 int CHIPSSetReadWrite(ScreenPtr pScreen, int bank);
405 int CHIPSSetReadPlanar(ScreenPtr pScreen, int bank);
406 int CHIPSSetWritePlanar(ScreenPtr pScreen, int bank);
407 int CHIPSSetReadWritePlanar(ScreenPtr pScreen, int bank);
408 int CHIPSWINSetRead(ScreenPtr pScreen, int bank);
409 int CHIPSWINSetWrite(ScreenPtr pScreen, int bank);
410 int CHIPSWINSetReadWrite(ScreenPtr pScreen, int bank);
411 int CHIPSWINSetReadPlanar(ScreenPtr pScreen, int bank);
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/xsrc/external/mit/xf86-video-trident/dist/src/
H A Dtrident_bank.c40 int TVGA8900SetRead(ScreenPtr pScreen, int bank) argument
46 OUTW(0x3c4, 0xC000 | (((bank & 0x3f) ^ 0x02)<<8)|0x0E);
49 int TGUISetRead(ScreenPtr pScreen, int bank) argument
55 OUTB(0x3d9, bank & 0xff);
58 int TVGA8900SetWrite(ScreenPtr pScreen, int bank) argument
64 OUTW(0x3c4, 0xC000 | (((bank & 0x3f) ^ 0x02)<<8)|0x0E);
67 int TGUISetWrite(ScreenPtr pScreen, int bank) argument
73 OUTB(0x3d8, bank & 0xff);
76 int TVGA8900SetReadWrite(ScreenPtr pScreen, int bank) argument
82 OUTW(0x3c4, 0xC000 | (((bank
85 TGUISetReadWrite(ScreenPtr pScreen,int bank) argument
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H A Dtrident.h285 int TGUISetRead(ScreenPtr pScreen, int bank);
286 int TGUISetWrite(ScreenPtr pScreen, int bank);
287 int TGUISetReadWrite(ScreenPtr pScreen, int bank);
288 int TVGA8900SetRead(ScreenPtr pScreen, int bank);
289 int TVGA8900SetWrite(ScreenPtr pScreen, int bank);
290 int TVGA8900SetReadWrite(ScreenPtr pScreen, int bank);
/xsrc/external/mit/xf86dga/dist/
H A Ddga.c37 int width, bank, banks, ram; local in function:main
117 XF86DGAGetVideo(dis, DefaultScreen(dis), &addr, &width, &bank, &ram);
118 fprintf(stderr, "%x addr:%p, width %d, bank size %d, depth %d planes\n", True,
119 addr, width, bank, bpp);
143 banks = (ram * 1024)/bank;
172 if (bank < 65536)
173 size = bank / 1024;
219 memset(addr, buf[0], bank);
222 fprintf(stderr, "memset(addr:%x, buf[0]:%d, bank:%d);\n",addr,buf[0],bank);
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/xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/r800/
H A Degbaddrlib.cpp528 // Re-compute if thickness changed since bank-height may be changed!
773 UINT_32 bankHeightAlign, ///< [in] bank height alignment
775 ADDR_TILEINFO* pTileInfo ///< [in,out] bank structure.
898 // Align bank height first according to latest h/w spec
1091 ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure
1456 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure
1467 // Tile equesiton with signle pipe bank
1598 UINT_32 bankSwizzle, ///< [in] bank swizzle
1599 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure
1614 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled
2348 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled
2471 ComputeSurfaceCoord2DFromBankPipe(AddrTileMode tileMode,UINT_32 x,UINT_32 y,UINT_32 slice,UINT_32 bank,UINT_32 pipe,UINT_32 bankSwizzle,UINT_32 pipeSwizzle,UINT_32 tileSlices,ADDR_TILEINFO * pTileInfo,CoordFromBankPipe * pOutput) const argument
2968 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeBankFromCoord
3085 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeBankFromAddr
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H A Degbaddrlib.h193 /// Adjusts bank before bank is modified by rotation
195 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0;
199 UINT_32 bank, UINT_32 pipe,
285 UINT_32 bank, UINT_32 pipe,
H A Dsiaddrlib.h232 UINT_32 bank, UINT_32 pipe,
238 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const;
/xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/r800/
H A Degbaddrlib.cpp527 // Re-compute if thickness changed since bank-height may be changed!
771 UINT_32 bankHeightAlign, ///< [in] bank height alignment
773 ADDR_TILEINFO* pTileInfo ///< [in,out] bank structure.
896 // Align bank height first according to latest h/w spec
1089 ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure
1453 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure
1464 // Tile equesiton with signle pipe bank
1595 UINT_32 bankSwizzle, ///< [in] bank swizzle
1596 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure
1611 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled
2349 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled
2472 ComputeSurfaceCoord2DFromBankPipe(AddrTileMode tileMode,UINT_32 x,UINT_32 y,UINT_32 slice,UINT_32 bank,UINT_32 pipe,UINT_32 bankSwizzle,UINT_32 pipeSwizzle,UINT_32 tileSlices,ADDR_TILEINFO * pTileInfo,CoordFromBankPipe * pOutput) const argument
2969 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeBankFromCoord
3087 UINT_32 bank; local in function:Addr::V1::EgBasedLib::ComputeBankFromAddr
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H A Degbaddrlib.h193 /// Adjusts bank before bank is modified by rotation
195 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0;
199 UINT_32 bank, UINT_32 pipe,
285 UINT_32 bank, UINT_32 pipe,
H A Dsiaddrlib.h231 UINT_32 bank, UINT_32 pipe,
237 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const;
/xsrc/external/mit/brotli/dist/c/enc/
H A Dhash_forgetful_chain_inc.h15 share a storage "bank". When more than "bank size" chain nodes are added,
138 const size_t bank = key & (NUM_BANKS - 1); local in function:FN
139 const size_t idx = self->free_slot_idx[bank]++ & (BANK_SIZE - 1);
143 banks[bank].slots[idx].delta = (uint16_t)delta;
144 banks[bank].slots[idx].next = head[key];
243 const size_t bank = key & (NUM_BANKS - 1); local in function:FN
254 slot = banks[bank].slots[last].next;
255 delta = banks[bank].slots[last].delta;
/xsrc/external/mit/xf86-video-cirrus/dist/src/
H A Dlg_hwcurs.c268 unsigned long page, bank; local in function:LgFindCursorTile
275 bank = (nX/tileWidth + nY/tileHeight) % nIL + page/(512*nIL);
277 *curAddr = bank*1024*1024L + page*2048 + (nY%tileHeight)*tileWidth;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Deg_asm.c50 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
51 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
63 S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
64 S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
H A Dr600_asm.c567 /* Just check every possible combination of bank swizzle.
954 /* we'll keep kcache sets sorted by bank & addr */
957 unsigned bank, unsigned line, unsigned index_mode)
965 if (kcache[i].bank < bank)
968 if ((kcache[i].bank == bank && kcache[i].addr > line+1) ||
969 kcache[i].bank > bank) {
978 kcache[i].bank
955 r600_bytecode_alloc_kcache_line(struct r600_bytecode * bc,struct r600_bytecode_kcache * kcache,unsigned bank,unsigned line,unsigned index_mode) argument
1024 unsigned bank, line, sel = alu->src[i].sel, index_mode; local in function:r600_bytecode_alloc_inst_kcache_lines
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H A Dr600_asm.h179 unsigned bank; member in struct:r600_bytecode_kcache
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Deg_asm.c50 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK2(cf->kcache[2].bank) |
51 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK3(cf->kcache[3].bank) |
63 S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
64 S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
H A Dr600_asm.c567 /* Just check every possible combination of bank swizzle.
959 /* we'll keep kcache sets sorted by bank & addr */
962 unsigned bank, unsigned line, unsigned index_mode)
970 if (kcache[i].bank < bank)
973 if ((kcache[i].bank == bank && kcache[i].addr > line+1) ||
974 kcache[i].bank > bank) {
983 kcache[i].bank
960 r600_bytecode_alloc_kcache_line(struct r600_bytecode * bc,struct r600_bytecode_kcache * kcache,unsigned bank,unsigned line,unsigned index_mode) argument
1029 unsigned bank, line, sel = alu->src[i].sel, index_mode; local in function:r600_bytecode_alloc_inst_kcache_lines
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H A Dr600_asm.h183 unsigned bank; member in struct:r600_bytecode_kcache
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/
H A Dr300_fs.c306 unsigned int bank = 0; local in function:r300_emit_fs_code_to_buffer
343 unsigned int bank_alu_offset = bank * 64;
345 unsigned int bank_tex_offset = bank * 32;
349 (bank << R400_BANK_SHIFT) | R400_R390_MODE_ENABLE : 0);//2
383 bank++;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/
H A Dr300_fs.c306 unsigned int bank = 0; local in function:r300_emit_fs_code_to_buffer
343 unsigned int bank_alu_offset = bank * 64;
345 unsigned int bank_tex_offset = bank * 32;
349 (bank << R400_BANK_SHIFT) | R400_R390_MODE_ENABLE : 0);//2
383 bank++;
/xsrc/external/mit/libXxf86dga/dist/src/
H A DXF86DGA.c570 int *bank,
588 XF86DGAGetVideoLL(dis, screen , &offset, width, bank, ram);
590 *addr = MapPhysAddress(offset, *bank);
597 if ((mp = FindMap(offset, *bank)))
565 XF86DGAGetVideo(Display * dis,int screen,char ** addr,int * width,int * bank,int * ram) argument
/xsrc/external/mit/MesaLib/dist/src/freedreno/afuc/
H A DREADME.rst17 them; any global state like which bank of context registers is to
214 arranged so bit 11 is zero for bank 0 and 1 for bank 1. The ME fw (at
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/
H A Dsb_bc_builder.cpp214 .KCACHE_BANK2(bc.kc[2].bank)
215 .KCACHE_BANK3(bc.kc[3].bank)
232 .KCACHE_BANK0(bc.kc[0].bank)
233 .KCACHE_BANK1(bc.kc[1].bank)
H A Dsb_bc_decoder.cpp118 bc.kc[0].bank = w0.get_KCACHE_BANK0();
119 bc.kc[1].bank = w0.get_KCACHE_BANK1();
151 bc.kc[2].bank = w0.get_KCACHE_BANK2();
152 bc.kc[3].bank = w0.get_KCACHE_BANK3();

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