Searched refs:bits2 (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/xf86-video-neomagic/dist/src/
H A Dneo_cursor.c97 CARD32 bits, bits2; local in function:neoSetCursorPosition
136 bits2 = ((CARD32 *)src)[i+1];
139 REVBITS_32(bits2);
141 bits = ((bits >> xoff) | (bits2 << (32-xoff)));
142 bits2 >>= xoff;
145 REVBITS_32(bits2);
148 ((CARD32 *) nAcl->CursTemp)[i+1] = bits2;
154 bits2 = ((CARD32 *)src)[i+1];
156 REVBITS_32(bits2);
158 bits = (bits2 >> (xof
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_disasm.c703 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT) {
707 inst->bits2.da1.src0_vert_stride,
708 inst->bits2.da1.src0_width,
709 inst->bits2.da1.src0_horiz_stride,
710 inst->bits2.da1.src0_reg_nr,
711 inst->bits2.da1.src0_subreg_nr,
712 inst->bits2.da1.src0_abs,
713 inst->bits2.da1.src0_negate);
718 inst->bits2.ia1.src0_indirect_offset,
719 inst->bits2
[all...]
H A Dbrw_eu_emit.c247 insn->bits2.da1.src0_abs = reg.abs;
248 insn->bits2.da1.src0_negate = reg.negate;
249 insn->bits2.da1.src0_address_mode = reg.address_mode;
261 insn->bits2.da1.src0_subreg_nr = reg.subnr;
262 insn->bits2.da1.src0_reg_nr = reg.nr;
264 insn->bits2.da16.src0_subreg_nr = reg.subnr / 16;
265 insn->bits2.da16.src0_reg_nr = reg.nr;
268 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
273 insn->bits2
[all...]
H A Dbrw_eu.h717 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_disasm.c703 if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT) {
707 inst->bits2.da1.src0_vert_stride,
708 inst->bits2.da1.src0_width,
709 inst->bits2.da1.src0_horiz_stride,
710 inst->bits2.da1.src0_reg_nr,
711 inst->bits2.da1.src0_subreg_nr,
712 inst->bits2.da1.src0_abs,
713 inst->bits2.da1.src0_negate);
718 inst->bits2.ia1.src0_indirect_offset,
719 inst->bits2
[all...]
H A Dbrw_eu_emit.c247 insn->bits2.da1.src0_abs = reg.abs;
248 insn->bits2.da1.src0_negate = reg.negate;
249 insn->bits2.da1.src0_address_mode = reg.address_mode;
261 insn->bits2.da1.src0_subreg_nr = reg.subnr;
262 insn->bits2.da1.src0_reg_nr = reg.nr;
264 insn->bits2.da16.src0_subreg_nr = reg.subnr / 16;
265 insn->bits2.da16.src0_reg_nr = reg.nr;
268 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
271 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
273 insn->bits2
[all...]
H A Dbrw_eu.h717 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xfs/dist/difs/
H A Dcharinfo.c343 unsigned char bits1, bits2; local in function:packGlyphs
606 bits2 = 0;
609 bits2 = *srcp++;
620 MSBBitLeft (bits2, lshift);
625 LSBBitLeft (bits2, lshift);
627 bits2 = bits1;
633 *dstp = MSBBitLeft (bits2, lshift);
635 *dstp = LSBBitLeft (bits2, lshift);
/xsrc/external/mit/MesaLib.old/dist/src/mesa/main/
H A Dtexcompress_s3tc_tmp.h389 GLuint bits = 0, bits2 = 0; local in function:storedxtencodedblock
473 bits2 |= enc << (2 * (j * 4 + i));
486 *blkaddr++ = bits2 & 0xff;
487 *blkaddr++ = ( bits2 >> 8) & 0xff;
488 *blkaddr++ = ( bits2 >> 16) & 0xff;
489 *blkaddr = bits2 >> 24;
/xsrc/external/mit/MesaLib/dist/src/mesa/main/
H A Dtexcompress_s3tc_tmp.h389 GLuint bits = 0, bits2 = 0; local in function:storedxtencodedblock
473 bits2 |= (uint32_t)enc << (2 * (j * 4 + i));
486 *blkaddr++ = bits2 & 0xff;
487 *blkaddr++ = ( bits2 >> 8) & 0xff;
488 *blkaddr++ = ( bits2 >> 16) & 0xff;
489 *blkaddr = bits2 >> 24;
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_structs.h419 } bits2; member in struct:brw_state_base_address
1249 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_structs.h419 } bits2; member in struct:brw_state_base_address
1249 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_structs.h419 } bits2; member in struct:brw_state_base_address
1249 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_structs.h419 } bits2; member in struct:brw_state_base_address
1249 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_structs.h419 } bits2; member in struct:brw_state_base_address
1244 } bits2; member in struct:brw_instruction
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen4_render.h1434 } bits2; member in struct:gen4_state_base_address
2312 } bits2; member in struct:gen4_instruction
H A Dgen5_render.h1522 } bits2; member in struct:gen5_state_base_address
2392 } bits2; member in struct:gen5_instruction
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen4_render.h1434 } bits2; member in struct:gen4_state_base_address
2312 } bits2; member in struct:gen4_instruction
H A Dgen5_render.h1522 } bits2; member in struct:gen5_state_base_address
2392 } bits2; member in struct:gen5_instruction

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