Searched refs:bpb (Results 1 - 25 of 56) sorted by relevance

123

/xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
H A Disl_gen9.c43 const uint32_t bpb = fmtl->bpb; local in function:gen9_calc_std_image_alignment_sa
52 .w = 1 << (12 - (ffs(bpb) - 4) + (4 * is_Ys)),
63 .w = 1 << (6 - ((ffs(bpb) - 4) / 2) + (4 * is_Ys)),
64 .h = 1 << (6 - ((ffs(bpb) - 3) / 2) + (4 * is_Ys)),
89 .w = 1 << (4 - ((ffs(bpb) - 2) / 3) + (4 * is_Ys)),
90 .h = 1 << (4 - ((ffs(bpb) - 4) / 3) + (2 * is_Ys)),
91 .d = 1 << (4 - ((ffs(bpb) - 3) / 3) + (2 * is_Ys)),
H A Disl_gen4.c94 if (isl_format_get_layout(info->format)->bpb >= 128)
H A Disl_storage_image.c208 return isl_format_get_layout(fmt)->bpb <= 64;
210 return isl_format_get_layout(fmt)->bpb <= 32;
250 const int cpp = isl_format_get_layout(surf->format)->bpb / 8;
322 param->stride[0] = isl_format_get_layout(format)->bpb / 8;
H A Disl.c282 * 128bpb format. The tiling has the same physical dimensions as
1291 const uint32_t bs = fmtl->bpb / 8;
1311 const uint32_t bs = fmtl->bpb / 8;
1325 assert(fmtl->bpb % tile_info->format_bpb == 0);
1327 const uint32_t tile_el_scale = fmtl->bpb / tile_info->format_bpb;
1456 isl_tiling_get_info(tiling, fmtl->bpb, &tile_info);
1509 base_alignment_B = MAX(base_alignment_B, fmtl->bpb / 4);
1511 base_alignment_B = MAX(base_alignment_B, fmtl->bpb / 8);
1592 isl_tiling_get_info(surf->tiling, fmtl->bpb, tile_info);
1770 switch (isl_format_get_layout(surf->format)->bpb) {
2272 isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,uint32_t bpb,uint32_t row_pitch_B,uint32_t total_x_offset_el,uint32_t total_y_offset_el,uint32_t * base_address_offset,uint32_t * x_offset_el,uint32_t * y_offset_el) argument
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H A Disl_surface_state.c262 * that they're at least the same bpb and block size.
268 assert(surf_fmtl->bpb == view_fmtl->bpb);
498 assert(isl_is_pow2(isl_format_get_layout(info->view->format)->bpb));
506 if (isl_format_get_layout(info->view->format)->bpb == 8)
508 if (isl_format_get_layout(info->view->format)->bpb == 16)
696 info->stride_B < isl_format_get_layout(info->format)->bpb / 8) {
H A Dgen_format_layout.py70 .bpb = ${format.bpb},
162 self.bpb = int(line[1])
H A Disl_gen7.c295 if (ISL_DEV_GEN(dev) < 7 && isl_format_get_layout(info->format)->bpb >= 128)
/xsrc/external/mit/MesaLib/dist/src/intel/isl/
H A Disl_gfx9.c43 const uint32_t bpb = fmtl->bpb; local in function:gfx9_calc_std_image_alignment_sa
52 .w = 1 << (12 - (ffs(bpb) - 4) + (4 * is_Ys)),
63 .w = 1 << (6 - ((ffs(bpb) - 4) / 2) + (4 * is_Ys)),
64 .h = 1 << (6 - ((ffs(bpb) - 3) / 2) + (4 * is_Ys)),
89 .w = 1 << (4 - ((ffs(bpb) - 2) / 3) + (4 * is_Ys)),
90 .h = 1 << (4 - ((ffs(bpb) - 4) / 3) + (2 * is_Ys)),
91 .d = 1 << (4 - ((ffs(bpb) - 3) / 3) + (2 * is_Ys)),
H A Disl_gfx12.c81 /* Tile64 is not defined for format sizes that are 24, 48, and 96 bpb. */
82 if (isl_format_get_layout(info->format)->bpb % 3 == 0)
112 isl_tiling_get_info(tiling, info->dim, msaa_layout, fmtl->bpb,
150 } else if (!isl_is_pow2(fmtl->bpb)) {
174 *image_align_el = isl_extent3d(128 * 8 / fmtl->bpb, 4, 1);
H A Disl_gfx4.c79 if (isl_format_get_layout(info->format)->bpb >= 128)
H A Disl_gfx8.c177 fmtl->bpb == 32 && info->samples == 1) {
H A Disl_storage_image.c208 return isl_format_get_layout(fmt)->bpb <= 64;
210 return isl_format_get_layout(fmt)->bpb <= 32;
254 const int cpp = isl_format_get_layout(surf->format)->bpb / 8;
326 param->stride[0] = isl_format_get_layout(format)->bpb / 8;
H A Disl.c470 * 128bpb format. The tiling has the same physical dimensions as
1565 const uint32_t bs = fmtl->bpb / 8;
1609 const uint32_t bs = fmtl->bpb / 8;
1623 assert(fmtl->bpb % tile_info->format_bpb == 0);
1625 const uint32_t tile_el_scale = fmtl->bpb / tile_info->format_bpb;
1764 isl_tiling_get_info(tiling, info->dim, msaa_layout, fmtl->bpb,
1814 base_alignment_B = MAX(base_alignment_B, fmtl->bpb / 4);
1816 base_alignment_B = MAX(base_alignment_B, fmtl->bpb / 8);
1942 isl_tiling_get_info(surf->tiling, surf->dim, surf->msaa_layout, fmtl->bpb,
2140 if (!isl_is_pow2(isl_format_get_layout(surf->format)->bpb))
3080 isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,enum isl_surf_dim dim,enum isl_msaa_layout msaa_layout,uint32_t bpb,uint32_t samples,uint32_t row_pitch_B,uint32_t array_pitch_el_rows,uint32_t total_x_offset_el,uint32_t total_y_offset_el,uint32_t total_z_offset_el,uint32_t total_array_offset,uint64_t * tile_offset_B,uint32_t * x_offset_el,uint32_t * y_offset_el,uint32_t * z_offset_el,uint32_t * array_offset) argument
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H A Disl_surface_state.c176 } else if (isl_format_get_layout(surf->format)->bpb % 3 == 0) {
178 * units of elements for 24, 48, and 96 bpb formats.
185 const uint32_t bs = isl_format_get_layout(surf->format)->bpb / 8;
314 * that they're at least the same bpb and block size.
320 assert(surf_fmtl->bpb == view_fmtl->bpb);
598 assert(isl_is_pow2(isl_format_get_layout(info->view->format)->bpb));
606 if (isl_format_get_layout(info->view->format)->bpb == 8)
608 if (isl_format_get_layout(info->view->format)->bpb == 16)
873 info->stride_B < isl_format_get_layout(info->format)->bpb /
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H A Dgen_format_layout.py76 .bpb = ${format.bpb},
173 self.bpb = int(line[1])
/xsrc/external/mit/MesaLib/src/intel/isl/
H A Disl_format_layout.c612 .bpb = 128,
632 .bpb = 128,
652 .bpb = 128,
672 .bpb = 128,
692 .bpb = 128,
712 .bpb = 128,
732 .bpb = 128,
752 .bpb = 128,
772 .bpb = 128,
792 .bpb
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/xsrc/external/mit/MesaLib.old/src/intel/
H A Disl_format_layout.c33 .bpb = 128,
53 .bpb = 128,
73 .bpb = 128,
93 .bpb = 128,
113 .bpb = 128,
133 .bpb = 128,
153 .bpb = 128,
173 .bpb = 128,
193 .bpb = 128,
213 .bpb
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_formats.c200 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 && fmtl->bpb != 96;
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_nir_lower_image_load_store.c454 assert(image_fmtl->bpb == 64 || image_fmtl->bpb == 128);
455 enum isl_format raw_fmt = (image_fmtl->bpb == 64) ?
485 load->num_components = image_fmtl->bpb / 32;
609 assert(image_fmtl->bpb == 64 || image_fmtl->bpb == 128);
610 enum isl_format raw_fmt = (image_fmtl->bpb == 64) ?
644 store->num_components = image_fmtl->bpb / 32;
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_nir_lower_storage_image.c404 assert(image_fmtl->bpb == 64 || image_fmtl->bpb == 128);
405 enum isl_format raw_fmt = (image_fmtl->bpb == 64) ?
431 nir_image_deref_load_raw_intel(b, image_fmtl->bpb / 32, 32,
556 assert(image_fmtl->bpb == 64 || image_fmtl->bpb == 128);
557 enum isl_format raw_fmt = (image_fmtl->bpb == 64) ?
591 store->num_components = image_fmtl->bpb / 32;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/
H A Dsvga_screen_cache.c47 unsigned bw, bh, bpb, total_size, i; local in function:surface_size
60 svga_format_size(key->format, &bw, &bh, &bpb);
68 unsigned img_size = ((w + bw - 1) / bw) * ((h + bh - 1) / bh) * d * bpb;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_formats.c479 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 &&
480 (fmtl->bpb != 96 || target == PIPE_BUFFER);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_blt.c52 unsigned cpp = fmtl->bpb / 8;
243 unsigned src_cpp = src_fmtl->bpb / 8;
245 const unsigned dst_cpp = dst_fmtl->bpb / 8;
H A Dcrocus_formats.c549 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 && fmtl->bpb != 96;
/xsrc/external/mit/MesaLib.old/dist/src/intel/blorp/
H A Dblorp_blit.c910 assert(src_fmtl->bpb == dst_fmtl->bpb);
922 if (src_fmtl->bpb <= 32) {
1997 if (isl_format_get_layout(params->dst.view.format)->bpb % 3 == 0) {
2345 get_copy_format_for_bpb(const struct isl_device *isl_dev, unsigned bpb) argument
2361 switch (bpb) {
2371 unreachable("Unknown format bpb");
2374 switch (bpb) {
2384 unreachable("Unknown format bpb");
2484 * ones with the same bpb) an
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