| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| H A D | helpers.cpp | 717 VkPipelineDepthStencilStateCreateInfo ds_state; local in function:PipelineBuilder::create_graphics_pipeline
718 ds_state.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO;
719 ds_state.pNext = NULL;
720 ds_state.flags = 0;
721 ds_state.depthTestEnable = ds_output != VK_FORMAT_UNDEFINED;
722 ds_state.depthWriteEnable = true;
723 ds_state.depthCompareOp = VK_COMPARE_OP_ALWAYS;
724 ds_state.depthBoundsTestEnable = false;
725 ds_state.stencilTestEnable = true;
726 ds_state
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| H A D | gen7_cmd_buffer.c | 241 struct anv_state ds_state = local in function:genX
248 dsp.PointertoDEPTH_STENCIL_STATE = ds_state.offset;
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| /xsrc/external/mit/MesaLib/dist/src/broadcom/vulkan/ |
| H A D | v3dv_meta_clear.c | 472 const VkPipelineDepthStencilStateCreateInfo *ds_state,
546 .pDepthStencilState = ds_state,
611 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_color_clear_pipeline
643 &ds_state,
673 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_depth_clear_pipeline
702 &ds_state,
464 create_pipeline(struct v3dv_device * device,struct v3dv_render_pass * pass,uint32_t subpass_idx,uint32_t samples,struct nir_shader * vs_nir,struct nir_shader * gs_nir,struct nir_shader * fs_nir,const VkPipelineVertexInputStateCreateInfo * vi_state,const VkPipelineDepthStencilStateCreateInfo * ds_state,const VkPipelineColorBlendStateCreateInfo * cb_state,const VkPipelineLayout layout,VkPipeline * pipeline) argument
|
| H A D | v3dv_meta_copy.c | 1581 const VkPipelineDepthStencilStateCreateInfo *ds_state,
1823 VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_texel_buffer_copy_pipeline
1853 &ds_state,
3345 const VkPipelineDepthStencilStateCreateInfo *ds_state,
3417 .pDepthStencilState = ds_state,
3513 VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_blit_pipeline
3543 &ds_state,
3339 create_pipeline(struct v3dv_device * device,struct v3dv_render_pass * pass,struct nir_shader * vs_nir,struct nir_shader * gs_nir,struct nir_shader * fs_nir,const VkPipelineVertexInputStateCreateInfo * vi_state,const VkPipelineDepthStencilStateCreateInfo * ds_state,const VkPipelineColorBlendStateCreateInfo * cb_state,const VkPipelineMultisampleStateCreateInfo * ms_state,const VkPipelineLayout layout,VkPipeline * pipeline) argument
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_compute.c | 49 .ds_state = true, .gs_state = true,
|
| H A D | fd6_draw.c | 395 .ds_state = true, .gs_state = true,
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| H A D | fd6_emit.c | 1238 .ds_state = true, .gs_state = true,
|
| H A D | fd6_program.c | 281 .ds_state = true, .gs_state = true,
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| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| H A D | gfx7_cmd_buffer.c | 332 struct anv_state ds_state = local in function:genX
339 dsp.PointertoDEPTH_STENCIL_STATE = ds_state.offset;
|
| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_meta_clear.c | 80 const VkPipelineDepthStencilStateCreateInfo *ds_state,
139 .pDepthStencilState = ds_state,
270 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_color_pipeline
296 &vi_state, &ds_state, &cb_state, device->meta_state.clear_color_p_layout,
604 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_depthstencil_pipeline
640 &vi_state, &ds_state, &cb_state, device->meta_state.clear_depth_p_layout,
77 create_pipeline(struct radv_device * device,struct radv_render_pass * render_pass,uint32_t samples,struct nir_shader * vs_nir,struct nir_shader * fs_nir,const VkPipelineVertexInputStateCreateInfo * vi_state,const VkPipelineDepthStencilStateCreateInfo * ds_state,const VkPipelineColorBlendStateCreateInfo * cb_state,const VkPipelineLayout layout,const struct radv_graphics_pipeline_create_info * extra,const VkAllocationCallbacks * alloc,VkPipeline * pipeline) argument
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_meta_clear.c | 101 const VkPipelineDepthStencilStateCreateInfo *ds_state,
160 .pDepthStencilState = ds_state,
269 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_color_pipeline
298 samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state,
584 const VkPipelineDepthStencilStateCreateInfo ds_state = { local in function:create_depthstencil_pipeline
620 samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state,
95 create_pipeline(struct radv_device * device,struct radv_render_pass * render_pass,uint32_t samples,struct nir_shader * vs_nir,struct nir_shader * fs_nir,const VkPipelineVertexInputStateCreateInfo * vi_state,const VkPipelineDepthStencilStateCreateInfo * ds_state,const VkPipelineColorBlendStateCreateInfo * cb_state,const VkPipelineLayout layout,const struct radv_graphics_pipeline_create_info * extra,const VkAllocationCallbacks * alloc,VkPipeline * pipeline) argument
|
| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 20.3.5.rst | 288 - aco: Initialize ds_state.front.writeMask.
|
| H A D | 21.0.0.rst | 3263 - aco: Initialize ds_state.front.writeMask.
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| H A D | 21.1.0.rst | 5497 - aco: Initialize ds_state.front.writeMask.
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| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| H A D | genX_state_upload.c | 4165 static const struct brw_tracked_state genX(ds_state) = {
5844 &genX(ds_state),
5933 &genX(ds_state),
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| H A D | genX_state_upload.c | 4092 static const struct brw_tracked_state genX(ds_state) = {
5771 &genX(ds_state),
5860 &genX(ds_state),
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 4429 uint32_t *ds_state = (void *) shader->derived_data; local in function:iris_store_tes_state
4430 uint32_t *te_state = ds_state + GENX(3DSTATE_DS_length);
4432 iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) {
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 3656 uint32_t *ds_state = te_state + GENX(3DSTATE_TE_length); local in function:iris_store_tes_state
3667 iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) {
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| H A D | tu_clear_blit.c | 620 .ds_state = true,
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| H A D | tu_pipeline.c | 1625 .ds_state = true,
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| H A D | tu_cmd_buffer.c | 487 * dEQP-VK.dynamic_state.ds_state.depth_bounds_1
759 .ds_state = true,
|