Searched refs:engine (Results 1 - 25 of 106) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/util/tests/drirc_configdir/
H A D00-test.conf4 <!ELEMENT device (application | engine)+>
12 <!ELEMENT engine (option+)>
14 <!-- engine_name_match: A regexp matching the engine name -->
18 <!ATTLIST engine engine_name_match CDATA #REQUIRED
44 <engine engine_name_match="Versioned Engine.*" engine_versions="0:1">
46 </engine>
47 <engine engine_name_match="Versioned Engine.*" engine_versions="2:3">
49 </engine>
/xsrc/external/mit/MesaLib.old/dist/src/intel/tools/
H A Daub_read.h53 void (*ring_write)(void *user_data, enum drm_i915_gem_engine_class engine,
55 void (*execlist_write)(void *user_data, enum drm_i915_gem_engine_class engine,
H A Daub_read.c140 enum drm_i915_gem_engine_class engine = I915_ENGINE_CLASS_RENDER; local in function:handle_trace_block
155 engine = I915_ENGINE_CLASS_RENDER;
158 engine = I915_ENGINE_CLASS_VIDEO;
161 engine = I915_ENGINE_CLASS_COPY;
169 read->ring_write(read->user_data, engine, data, size);
186 enum drm_i915_gem_engine_class engine; local in function:handle_memtrace_reg_write
196 engine = I915_ENGINE_CLASS_RENDER;
206 engine = I915_ENGINE_CLASS_VIDEO;
216 engine = I915_ENGINE_CLASS_COPY;
239 engine
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H A Daubinator.c142 handle_execlist_write(void *user_data, enum drm_i915_gem_engine_class engine, uint64_t context_descriptor) argument
166 batch_ctx.engine = engine;
180 handle_ring_write(void *user_data, enum drm_i915_gem_engine_class engine, argument
186 batch_ctx.engine = engine;
H A Daubinator_viewer.h73 enum drm_i915_gem_engine_class engine; member in struct:aub_viewer_decode_ctx
/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Daub_read.h53 void (*ring_write)(void *user_data, enum drm_i915_gem_engine_class engine,
55 void (*execlist_write)(void *user_data, enum drm_i915_gem_engine_class engine,
H A Daub_read.c138 enum drm_i915_gem_engine_class engine = I915_ENGINE_CLASS_RENDER; local in function:handle_trace_block
153 engine = I915_ENGINE_CLASS_RENDER;
156 engine = I915_ENGINE_CLASS_VIDEO;
159 engine = I915_ENGINE_CLASS_COPY;
167 read->ring_write(read->user_data, engine, data, size);
184 enum drm_i915_gem_engine_class engine; local in function:handle_memtrace_reg_write
194 engine = I915_ENGINE_CLASS_RENDER;
204 engine = I915_ENGINE_CLASS_VIDEO;
214 engine = I915_ENGINE_CLASS_COPY;
237 engine
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H A Daubinator.c141 handle_execlist_write(void *user_data, enum drm_i915_gem_engine_class engine, uint64_t context_descriptor) argument
165 batch_ctx.engine = engine;
179 handle_ring_write(void *user_data, enum drm_i915_gem_engine_class engine, argument
185 batch_ctx.engine = engine;
H A Daubinator_viewer.h73 enum drm_i915_gem_engine_class engine; member in struct:aub_viewer_decode_ctx
H A Daub_write.c349 static const struct engine { struct
450 static const struct engine *
523 const struct engine *cs = engine_from_engine_class(engine_class);
667 const struct engine *cs,
722 const struct engine *cs,
744 aub_dump_execlist(struct aub_file *aub, const struct engine *cs, uint64_t descriptor)
828 const struct engine *cs = engine_from_engine_class(engine_class);
848 const struct engine *cs = engine_from_engine_class(engine_class);
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/gallivm/
H A Dlp_bld_init.h46 LLVMExecutionEngineRef engine; member in struct:gallivm_state
H A Dlp_bld_init.c198 if (gallivm->engine) {
200 LLVMDisposeExecutionEngine(gallivm->engine);
208 /* Don't free the TargetData, it's owned by the exec engine */
220 gallivm->engine = NULL;
237 assert(!gallivm->engine);
260 ret = lp_build_create_jit_compiler_for_module(&gallivm->engine,
275 gallivm->target = LLVMGetExecutionEngineTargetData(gallivm->engine);
284 LLVMTargetDataRef target = LLVMGetExecutionEngineTargetData(gallivm->engine);
293 debug_printf("engine target data = %s\n", engine_data_layout);
350 * complete when MC-JIT is created. So defer the MC-JIT engine creatio
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/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/gallivm/
H A Dlp_bld_init.c209 if (gallivm->engine) {
211 LLVMDisposeExecutionEngine(gallivm->engine);
231 gallivm->engine = NULL;
250 assert(!gallivm->engine);
273 ret = lp_build_create_jit_compiler_for_module(&gallivm->engine,
292 LLVMTargetDataRef target = LLVMGetExecutionEngineTargetData(gallivm->engine);
301 debug_printf("engine target data = %s\n", engine_data_layout);
361 * complete when MC-JIT is created. So defer the MC-JIT engine creation for
366 * MC-JIT engine compiles the module immediately on creation, so we can't
640 * to the module. As of LLVM 3.8 the module and the execution engine ar
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H A Dlp_bld_init.h47 LLVMExecutionEngineRef engine; member in struct:gallivm_state
H A Dlp_bld_coro.c159 assert(gallivm->engine);
163 LLVMAddGlobalMapping(gallivm->engine, gallivm->coro_malloc_hook, coro_malloc);
164 LLVMAddGlobalMapping(gallivm->engine, gallivm->coro_free_hook, coro_free);
/xsrc/external/mit/xf86-video-nouveau/dist/src/
H A Dnouveau_copy.c42 int engine; member in struct:nouveau_copy_init::__anoncf7cbd2d0108
92 .engine = NVE0_FIFO_ENGINE_CE0 |
118 method->engine << 16 | method->oclass,
/xsrc/external/mit/MesaLib/dist/src/util/
H A Ddriconf_static.py60 self.cname = cname('engine')
79 for engine in xml.findall('engine'):
80 self.engines.append(Engine(engine))
155 % for engine in device.engines:
156 ${render_options(engine.cname + '_options', engine.options)}
161 % for engine in device.engines:
162 { .engine_name_match = "${engine.engine_name_match}",
163 % if engine
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/xsrc/external/mit/xf86-video-crime/dist/src/
H A Dcrime.h88 void *engine; member in struct:__anon63ea81b20108
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_batch.c168 uint8_t engine,
176 /* engine should be one of I915_EXEC_RENDER, I915_EXEC_BLT, etc. */
177 assert((engine & ~I915_EXEC_RING_MASK) == 0);
178 assert(util_bitcount(engine) == 1);
179 batch->engine = engine;
480 .flags = batch->engine |
162 iris_init_batch(struct iris_batch * batch,struct iris_screen * screen,struct iris_vtable * vtbl,struct pipe_debug_callback * dbg,struct iris_batch * all_batches,enum iris_batch_name name,uint8_t engine,int priority) argument
H A Diris_batch.h77 /** Which engine this batch targets - a I915_EXEC_RING_MASK value */
78 uint8_t engine; member in struct:iris_batch
/xsrc/external/mit/MesaLib.old/dist/src/intel/common/
H A Dgen_decoder.h60 enum drm_i915_gem_engine_class engine,
239 enum drm_i915_gem_engine_class engine; member in struct:gen_batch_decode_ctx
/xsrc/external/mit/mesa-demos/dist/src/demos/
H A DMakefile.am47 engine \ program in directory:bin
/xsrc/external/mit/MesaLib/dist/src/util/tests/
H A Dxmlconfig.cpp36 const char *engine, int enginever);
192 const char *engine, int enginever)
215 engine, enginever);
189 drirc_init(const char * driver,const char * drm,const char * exec_name,const char * app,int appver,const char * engine,int enginever) argument
/xsrc/external/mit/freetype/dist/builds/unix/
H A Dftconfig.h.in22 * the rest of the engine. Most of the macros here are automatically
/xsrc/external/mit/MesaLib/dist/src/intel/common/
H A Dintel_decoder.h62 enum drm_i915_gem_engine_class engine,
252 enum drm_i915_gem_engine_class engine; member in struct:intel_batch_decode_ctx

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