Searched refs:engine_class (Results 1 - 14 of 14) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/tools/
H A Derror2aub.c173 enum drm_i915_gem_engine_class engine_class; member in struct:bo
182 enum drm_i915_gem_engine_class engine_class,
188 bo_entry->engine_class == engine_class &&
196 new_bo->engine_class = engine_class;
205 enum drm_i915_gem_engine_class *engine_class,
210 enum drm_i915_gem_engine_class engine_class; member in struct:engine_from_name::__anon72ccc5590108
227 *engine_class = r->engine_class;
180 find_or_create(struct list_head * bo_list,uint64_t addr,enum address_space gtt,enum drm_i915_gem_engine_class engine_class,int engine_instance) argument
204 engine_from_name(const char * engine_name,enum drm_i915_gem_engine_class * engine_class,int * engine_instance) argument
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H A Daub_write.h95 uint64_t offset, enum drm_i915_gem_engine_class engine_class);
97 enum drm_i915_gem_engine_class engine_class);
H A Daub_write.c360 enum drm_i915_gem_engine_class engine_class; member in struct:engine
369 .engine_class = I915_ENGINE_CLASS_RENDER,
378 .engine_class = I915_ENGINE_CLASS_VIDEO,
387 .engine_class = I915_ENGINE_CLASS_COPY,
397 engine_from_engine_class(enum drm_i915_gem_engine_class engine_class) argument
399 switch (engine_class) {
403 return &engines[engine_class];
412 enum drm_i915_gem_engine_class engine_class,
430 gen8_contexts[engine_class](params, data, size);
432 gen10_contexts[engine_class](param
410 get_context_init(const struct gen_device_info * devinfo,const struct gen_context_parameters * params,enum drm_i915_gem_engine_class engine_class,uint32_t * data,uint32_t * size) argument
436 write_engine_execlist_setup(struct aub_file * aub,enum drm_i915_gem_engine_class engine_class) argument
712 aub_dump_ring_buffer_legacy(struct aub_file * aub,uint64_t batch_offset,uint64_t offset,enum drm_i915_gem_engine_class engine_class) argument
751 aub_write_exec(struct aub_file * aub,uint64_t batch_addr,uint64_t offset,enum drm_i915_gem_engine_class engine_class) argument
767 aub_write_context_execlists(struct aub_file * aub,uint64_t context_addr,enum drm_i915_gem_engine_class engine_class) argument
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/xsrc/external/mit/MesaLib/dist/src/intel/tools/
H A Derror2aub.c160 enum drm_i915_gem_engine_class engine_class; member in struct:bo
169 enum drm_i915_gem_engine_class engine_class,
175 bo_entry->engine_class == engine_class &&
183 new_bo->engine_class = engine_class;
192 enum drm_i915_gem_engine_class *engine_class,
197 enum drm_i915_gem_engine_class engine_class; member in struct:engine_from_name::__anoncacf824c0108
214 *engine_class = r->engine_class;
167 find_or_create(struct list_head * bo_list,uint64_t addr,enum address_space gtt,enum drm_i915_gem_engine_class engine_class,int engine_instance) argument
191 engine_from_name(const char * engine_name,enum drm_i915_gem_engine_class * engine_class,int * engine_instance) argument
[all...]
H A Daub_write.c351 enum drm_i915_gem_engine_class engine_class; member in struct:engine
360 .engine_class = I915_ENGINE_CLASS_RENDER,
369 .engine_class = I915_ENGINE_CLASS_VIDEO,
378 .engine_class = I915_ENGINE_CLASS_COPY,
451 engine_from_engine_class(enum drm_i915_gem_engine_class engine_class) argument
453 switch (engine_class) {
457 return &engines[engine_class];
466 enum drm_i915_gem_engine_class engine_class,
484 gfx8_contexts[engine_class](params, data, size);
486 gfx10_contexts[engine_class](param
464 get_context_init(const struct intel_device_info * devinfo,const struct intel_context_parameters * params,enum drm_i915_gem_engine_class engine_class,uint32_t * data,uint32_t * size) argument
502 write_hwsp(struct aub_file * aub,enum drm_i915_gem_engine_class engine_class) argument
518 write_engine_execlist_setup(struct aub_file * aub,uint32_t ctx_id,struct aub_hw_context * hw_ctx,enum drm_i915_gem_engine_class engine_class) argument
652 aub_write_ensure_context(struct aub_file * aub,uint32_t ctx_id,enum drm_i915_gem_engine_class engine_class) argument
773 aub_dump_ring_buffer_legacy(struct aub_file * aub,uint64_t batch_offset,uint64_t offset,enum drm_i915_gem_engine_class engine_class) argument
812 aub_write_ensure_hwsp(struct aub_file * aub,enum drm_i915_gem_engine_class engine_class) argument
825 aub_write_exec(struct aub_file * aub,uint32_t ctx_id,uint64_t batch_addr,uint64_t offset,enum drm_i915_gem_engine_class engine_class) argument
845 aub_write_context_execlists(struct aub_file * aub,uint64_t context_addr,enum drm_i915_gem_engine_class engine_class) argument
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H A Daub_write.h134 uint64_t offset, enum drm_i915_gem_engine_class engine_class);
136 enum drm_i915_gem_engine_class engine_class);
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_gem.c437 uint16_t engine_class = engine_classes[i]; local in function:anv_gem_create_context_engines
438 if (i915_engine_counts[engine_class] <= 0) {
449 int *idx = &last_engine_idx[engine_class];
452 if (info->engines[*idx].engine.engine_class == engine_class) {
462 *class_inst_ptr++ = engine_class;
786 uint16_t engine_class)
790 if (info->engines[i].engine.engine_class == engine_class)
785 anv_gem_count_engines(const struct drm_i915_query_engine_info * info,uint16_t engine_class) argument
H A Danv_gem_stubs.c280 uint16_t engine_class)
279 anv_gem_count_engines(const struct drm_i915_query_engine_info * info,uint16_t engine_class) argument
H A Danv_device.c704 .engine_class = I915_ENGINE_CLASS_RENDER,
712 .engine_class = I915_ENGINE_CLASS_RENDER,
720 .engine_class = I915_ENGINE_CLASS_RENDER,
734 .engine_class = I915_ENGINE_CLASS_RENDER,
3005 engine_classes[engine_count++] = queue_family->engine_class;
H A DgenX_state.c340 switch (queue->family->engine_class) {
H A Danv_private.h825 enum drm_i915_gem_engine_class engine_class; member in struct:anv_queue_family
1483 uint16_t engine_class);
/xsrc/external/mit/libdrm/dist/include/drm/
H A Di915_drm.h236 * @engine_class:
240 __u16 engine_class; member in struct:i915_engine_class_instance
1994 * engine_class: I915_ENGINE_CLASS_INVALID,
/xsrc/external/mit/MesaLib.old/dist/include/drm-uapi/
H A Di915_drm.h1522 __u16 engine_class; member in struct:drm_i915_gem_context_param_sseu
/xsrc/external/mit/MesaLib/dist/include/drm-uapi/
H A Di915_drm.h183 __u16 engine_class; /* see enum drm_i915_gem_engine_class */ member in struct:i915_engine_class_instance
1814 * engine_class: I915_ENGINE_CLASS_INVALID,

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