Searched refs:eot (Results 1 - 25 of 33) sorted by relevance

12

/xsrc/external/ofl/font-liberation-ttf/dist/
H A DMakefile73 FORMATS += eot
74 eot:: $(addprefix $(EXPORTDIR)/$(NAME), $(VARIANTS:=.eot)) target
76 $(EXPORTDIR)/%.eot: $(EXPORTDIR)/%.ttf | $(EXPORTDIR)
78 4web: ttf woff svg eot
82 # default for formats without extra recipes defined above (e.g., not "eot"):
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_ir.h177 bool eot:1; member in struct:backend_instruction
H A Dbrw_fs_visitor.cpp107 write->eot = true;
732 inst->eot = true;
942 inst->eot = false;
944 inst->eot = slot == last_slot && stage != MESA_SHADER_GEOMETRY;
977 inst->eot = true;
986 * send cycle, which is a urb write with an eot must be 4 phases long and
1021 inst->eot = true;
1043 inst->eot = true;
H A Dbrw_fs_cse.cpp194 a->eot == b->eot &&
H A Dbrw_fs_generator.cpp343 inst->eot);
349 inst->eot);
389 inst->eot,
875 brw_inst_set_eot(p->devinfo, insn, inst->eot);
902 brw_inst_set_eot(devinfo, insn, inst->eot);
1094 assert(!inst->eot || inst->exec_size == dispatch_width);
1957 if (inst->eot && is_accum_used && devinfo->ver >= 12) {
1967 if (!is_accum_used && !inst->eot) {
1976 if (inst->eot && devinfo->ver >= 12) {
H A Dbrw_eu.h1557 bool eot);
1569 bool eot);
1577 bool eot);
1593 bool eot,
H A Dbrw_eu_emit.c2455 bool eot,
2496 brw_inst_set_eot(devinfo, insn, eot);
2689 bool eot)
2733 brw_inst_set_eot(devinfo, send, eot);
2746 bool eot)
2805 unsigned imm_part = ex_desc_imm | sfid | eot << 5;
2850 brw_inst_set_eot(devinfo, send, eot);
3056 bool eot)
3075 eot);
2448 brw_fb_WRITE(struct brw_codegen * p,struct brw_reg payload,struct brw_reg implied_header,unsigned msg_control,unsigned binding_table_index,unsigned msg_length,unsigned response_length,bool eot,bool last_render_target,bool header_present) argument
2683 brw_send_indirect_message(struct brw_codegen * p,unsigned sfid,struct brw_reg dst,struct brw_reg payload,struct brw_reg desc,unsigned desc_imm,bool eot) argument
2737 brw_send_indirect_split_message(struct brw_codegen * p,unsigned sfid,struct brw_reg dst,struct brw_reg payload0,struct brw_reg payload1,struct brw_reg desc,unsigned desc_imm,struct brw_reg ex_desc,unsigned ex_desc_imm,bool eot) argument
3050 brw_ff_sync(struct brw_codegen * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,unsigned response_length,bool eot) argument
H A Dbrw_fs_reg_allocate.cpp276 if (inst->eot) {
614 if (inst->eot) {
H A Dbrw_shader.cpp1103 (eot && devinfo->ver >= 12); /* See Wa_14010017096. */
1155 return eot;
H A Dbrw_fs_bank_conflicts.cpp566 (is_grf(inst->src[i]) && inst->eot))
H A Dbrw_fs.cpp610 assert(end && ((fs_inst *) end)->eot);
1632 prev->eot = true;
1658 inst->eot = true;
3531 write->eot = true;
5201 inst->offset != 0 || inst->eot ||
5221 if (!inst->eot && regs_written(inst) != 4 * reg_width) {
5549 if (inst->eot) {
7874 split_inst.eot = inst->eot && i == int(n - 1);
8125 if (inst->eot) {
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_fs_visitor.cpp107 write->eot = true;
563 inst->eot = true;
827 inst->eot = false;
829 inst->eot = slot == last_slot && stage != MESA_SHADER_GEOMETRY;
862 inst->eot = true;
871 * send cycle, which is a urb write with an eot must be 4 phases long and
906 inst->eot = true;
931 inst->eot = true;
H A Dbrw_shader.h179 bool eot:1; member in struct:backend_instruction
H A Dbrw_fs_cse.cpp193 a->eot == b->eot &&
H A Dbrw_eu.h915 bool eot);
927 bool eot);
935 bool eot);
951 bool eot,
H A Dbrw_fs_generator.cpp283 inst->eot);
288 inst->eot);
353 inst->eot,
726 if (inst->eot && p->devinfo->gen == 10) {
752 brw_inst_set_eot(p->devinfo, insn, inst->eot);
773 brw_inst_set_eot(devinfo, insn, inst->eot);
957 assert(!inst->eot || inst->exec_size == dispatch_width);
H A Dbrw_eu_emit.c2275 bool eot,
2321 brw_inst_set_eot(devinfo, insn, eot);
2515 bool eot)
2552 brw_inst_set_eot(devinfo, send, eot);
2565 bool eot)
2616 brw_OR(p, addr, ex_desc, brw_imm_ud(ex_desc_imm | sfid | eot << 5));
2649 brw_inst_set_eot(devinfo, send, eot);
2846 bool eot)
2865 eot);
2268 brw_fb_WRITE(struct brw_codegen * p,struct brw_reg payload,struct brw_reg implied_header,unsigned msg_control,unsigned binding_table_index,unsigned msg_length,unsigned response_length,bool eot,bool last_render_target,bool header_present) argument
2509 brw_send_indirect_message(struct brw_codegen * p,unsigned sfid,struct brw_reg dst,struct brw_reg payload,struct brw_reg desc,unsigned desc_imm,bool eot) argument
2556 brw_send_indirect_split_message(struct brw_codegen * p,unsigned sfid,struct brw_reg dst,struct brw_reg payload0,struct brw_reg payload1,struct brw_reg desc,unsigned desc_imm,struct brw_reg ex_desc,unsigned ex_desc_imm,bool eot) argument
2840 brw_ff_sync(struct brw_codegen * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,unsigned response_length,bool eot) argument
H A Dbrw_fs_reg_allocate.cpp379 if (inst->eot) {
619 if (inst->eot) {
H A Dbrw_fs.cpp615 assert(end && ((fs_inst *) end)->eot);
1536 prev->eot = true;
1562 inst->eot = true;
2840 assert(fb_write->eot);
2882 assert(!tex_inst->eot); /* We can't get here twice */
2888 tex_inst->eot = true;
3409 write->eot = true;
4735 inst->offset != 0 || inst->eot ||
4755 if (!inst->eot && regs_written(inst) != 4 * reg_width) {
5064 if (inst->eot) {
[all...]
H A Dbrw_fs_bank_conflicts.cpp566 (is_grf(inst->src[i]) && inst->eot))
H A Dbrw_inst.h576 F(eot, 127, 127)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_eu_emit.c1457 0, /* eot */
1745 bool eot,
1786 eot,
1788 eot,
1866 bool eot,
1902 eot,
1990 bool eot)
2008 eot);
1737 brw_fb_WRITE(struct brw_compile * p,int dispatch_width,unsigned msg_reg_nr,struct brw_reg src0,unsigned msg_control,unsigned binding_table_index,unsigned msg_length,unsigned response_length,bool eot,bool header_present) argument
1858 brw_urb_WRITE(struct brw_compile * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,bool used,unsigned msg_length,unsigned response_length,bool eot,bool writes_complete,unsigned offset,unsigned swizzle) argument
1984 brw_ff_sync(struct brw_compile * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,unsigned response_length,bool eot) argument
H A Dbrw_eu.h2108 bool eot,
2119 bool eot);
2129 bool eot,
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_eu_emit.c1457 0, /* eot */
1745 bool eot,
1786 eot,
1788 eot,
1866 bool eot,
1902 eot,
1990 bool eot)
2008 eot);
1737 brw_fb_WRITE(struct brw_compile * p,int dispatch_width,unsigned msg_reg_nr,struct brw_reg src0,unsigned msg_control,unsigned binding_table_index,unsigned msg_length,unsigned response_length,bool eot,bool header_present) argument
1858 brw_urb_WRITE(struct brw_compile * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,bool used,unsigned msg_length,unsigned response_length,bool eot,bool writes_complete,unsigned offset,unsigned swizzle) argument
1984 brw_ff_sync(struct brw_compile * p,struct brw_reg dest,unsigned msg_reg_nr,struct brw_reg src0,bool allocate,unsigned response_length,bool eot) argument
H A Dbrw_eu.h2108 bool eot,
2119 bool eot);
2129 bool eot,

Completed in 79 milliseconds

12