Searched refs:fence_signalled (Results 1 - 25 of 25) sorted by path

/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/pipebuffer/
H A Dpb_buffer_fenced.c227 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
417 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
429 assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
685 ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
H A Dpb_buffer_fenced.h85 int (*fence_signalled)( struct pb_fence_ops *ops, member in struct:pb_fence_ops
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_screen.c578 return is->iws->fence_signalled(is->iws, fence) == 1;
H A Di915_winsys.h241 int (*fence_signalled)(struct i915_winsys *iws, member in struct:i915_winsys
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/svga/
H A Dsvga_screen.c793 retVal = sws->fence_signalled(sws, fence, 0) == 0;
H A Dsvga_screen_cache.c127 sws->fence_signalled(sws, entry->fence, 0) == 0) {
H A Dsvga_winsys.h634 int (*fence_signalled)( struct svga_winsys_screen *sws, member in struct:svga_winsys_screen
/xsrc/external/mit/MesaLib.old/dist/src/gallium/tools/trace/
H A Ddump_state.py213 def fence_signalled(self, fence): member in class:Screen
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_fence.c85 idws->base.fence_signalled = i915_drm_fence_signalled;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/svga/drm/
H A Dpb_buffer_simple_fenced.c191 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
389 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
402 assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
544 ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
H A Dvmw_fence.c492 ops->base.fence_signalled = &vmw_fence_ops_fence_signalled;
H A Dvmw_screen_svga.c496 vws->base.fence_signalled = vmw_svga_winsys_fence_signalled;
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D9.0.3.rst194 - r600g: fix int->bool conversion in fence_signalled
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/pipebuffer/
H A Dpb_buffer_fenced.c227 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
417 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
429 assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
685 ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
H A Dpb_buffer_fenced.h85 int (*fence_signalled)( struct pb_fence_ops *ops, member in struct:pb_fence_ops
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_screen.c614 return is->iws->fence_signalled(is->iws, fence) == 1;
H A Di915_winsys.h220 int (*fence_signalled)(struct i915_winsys *iws, member in struct:i915_winsys
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/svga/
H A Dsvga_screen.c741 retVal = sws->fence_signalled(sws, fence, 0) == 0;
H A Dsvga_screen_cache.c127 sws->fence_signalled(sws, entry->fence, 0) == 0) {
H A Dsvga_winsys.h658 int (*fence_signalled)( struct svga_winsys_screen *sws, member in struct:svga_winsys_screen
/xsrc/external/mit/MesaLib/dist/src/gallium/tools/trace/
H A Ddump_state.py214 def fence_signalled(self, fence): member in class:Screen
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/i915/drm/
H A Di915_drm_fence.c85 idws->base.fence_signalled = i915_drm_fence_signalled;
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/svga/drm/
H A Dpb_buffer_simple_fenced.c191 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
389 signaled = ops->fence_signalled(ops, fenced_buf->fence, 0);
402 assert(ops->fence_signalled(ops, fenced_buf->fence, 0) == 0);
544 ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
H A Dvmw_fence.c492 ops->base.fence_signalled = &vmw_fence_ops_fence_signalled;
H A Dvmw_screen_svga.c894 vws->base.fence_signalled = vmw_svga_winsys_fence_signalled;

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