| /xsrc/external/mit/MesaLib.old/src/intel/genxml/ |
| genX_bits.h | 60 switch (devinfo->gen) {
103 switch (devinfo->gen) {
143 switch (devinfo->gen) {
186 switch (devinfo->gen) {
226 switch (devinfo->gen) {
269 switch (devinfo->gen) {
309 switch (devinfo->gen) {
352 switch (devinfo->gen) {
392 switch (devinfo->gen) {
435 switch (devinfo->gen) {
[all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/ |
| brw_test.c | 31 void brw_test_compare(const char *function, int gen,
41 brw_disasm(stdout, &new[n], gen);
45 brw_disasm(stdout, &old[n], gen);
|
| brw_test.h | 37 void brw_test_compare(const char *function, int gen,
|
| brw_wm.c | 44 uv = p->gen >= 060 ? 6 : 3;
47 uv = p->gen >= 060 ? 4 : 3;
52 if (p->gen >= 060) {
99 if (p->gen >= 060) {
128 if (p->gen >= 060)
185 if (p->gen < 060) {
200 if (p->gen >= 060) {
222 if (dw == 8 && p->gen >= 060) {
236 if (p->gen >= 060) {
240 } else if (p->gen >= 045 && dw == 16)
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/ |
| brw_test.c | 31 void brw_test_compare(const char *function, int gen,
41 brw_disasm(stdout, &new[n], gen);
45 brw_disasm(stdout, &old[n], gen);
|
| brw_test.h | 37 void brw_test_compare(const char *function, int gen,
|
| brw_wm.c | 44 uv = p->gen >= 060 ? 6 : 3;
47 uv = p->gen >= 060 ? 4 : 3;
52 if (p->gen >= 060) {
99 if (p->gen >= 060) {
128 if (p->gen >= 060)
185 if (p->gen < 060) {
200 if (p->gen >= 060) {
222 if (dw == 8 && p->gen >= 060) {
236 if (p->gen >= 060) {
240 } else if (p->gen >= 045 && dw == 16)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| gen8_multisample_state.c | 40 assert(devinfo->gen == 10);
58 assert(devinfo->gen == 10);
79 if (devinfo->gen == 10)
102 if (devinfo->gen == 10)
|
| brw_pipe_control.c | 41 if (devinfo->gen >= 6 &&
95 assert(devinfo->gen >= 6);
102 if (devinfo->gen >= 8)
123 assert(devinfo->gen == 7);
274 if (devinfo->gen >= 6) {
358 if (devinfo->gen >= 6) {
374 switch (devinfo->gen) {
405 if (devinfo->gen < 6)
|
| brw_misc_state.c | 59 if (devinfo->gen == 5) {
222 if (devinfo->gen >= 6)
290 const unsigned len = (devinfo->is_g4x || devinfo->gen == 5) ? 6 : 5;
310 if (devinfo->is_g4x || devinfo->gen >= 5)
315 if (devinfo->gen >= 6)
338 if (devinfo->gen < 6) {
398 if (devinfo->gen == 6) {
432 if (devinfo->gen == 6) {
472 const bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x;
476 if (devinfo->gen >= 8 && devinfo->gen < 10)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_inst.h | 79 if (devinfo->gen >= 8) { \
81 } else if (devinfo->gen >= 7) { \
83 } else if (devinfo->gen >= 6) { \
85 } else if (devinfo->gen >= 5) { \
177 FC(branch_control, 28, 28, devinfo->gen >= 8)
178 FC(acc_wr_control, 28, 28, devinfo->gen >= 6)
179 FC(mask_control_ex, 28, 28, devinfo->is_g4x || devinfo->gen == 5)
181 FC(math_function, 27, 24, devinfo->gen >= 6)
278 FC(3src_a1_src2_subreg_nr, 117, 113, devinfo->gen >= 10)
279 FC(3src_a1_src2_hstride, 112, 111, devinfo->gen >= 10
[all...] |
| brw_compiler.c | 103 if (devinfo->gen >= 10) {
109 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_VS", true);
111 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TCS", true);
113 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TES", true);
115 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_GS", true);
153 if (devinfo->gen < 8 || devinfo->gen > 9)
160 devinfo->gen < 6 ? 16 : UINT_MAX;
176 if (devinfo->gen >= 11) {
182 if (devinfo->gen < 6)
[all...] |
| brw_eu.h | 259 if (devinfo->gen >= 5) {
272 if (devinfo->gen >= 5)
281 if (devinfo->gen >= 5)
291 assert(devinfo->gen >= 5);
323 if (devinfo->gen >= 7)
326 else if (devinfo->gen >= 5)
352 if (devinfo->gen >= 7)
354 else if (devinfo->gen >= 5 || devinfo->is_g4x)
363 assert(devinfo->gen >= 5);
364 if (devinfo->gen >= 7
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/isl/ |
| isl_storage_image.c | 110 return (devinfo->gen >= 9 ? format :
111 devinfo->gen >= 8 || devinfo->is_haswell ?
127 return (devinfo->gen >= 9 ? format :
128 devinfo->gen >= 8 || devinfo->is_haswell ?
134 return (devinfo->gen >= 9 ? format :
135 devinfo->gen >= 8 || devinfo->is_haswell ?
140 return (devinfo->gen >= 9 ? format :
141 devinfo->gen >= 8 || devinfo->is_haswell ?
147 return (devinfo->gen >= 9 ? format : ISL_FORMAT_R16_UINT);
151 return (devinfo->gen >= 9 ? format : ISL_FORMAT_R8_UINT)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/genxml/ |
| gen_bits_header.py | 71 % for gen, value in sorted(item.iter_prop(prop), reverse=True):
72 #define ${gen.prefix(item.token_name)}_${prop} ${value}
123 class Gen(object):
139 gen = self.tenx
141 if gen % 10 == 0:
142 gen //= 10
147 return 'GFX{}_{}'.format(gen, token)
157 def add_gen(self, gen, xml_attrs):
158 assert isinstance(gen, Gen)
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/genxml/ |
| gen_bits_header.py | 75 % for gen, value in sorted(item.iter_prop(prop), reverse=True):
76 #define ${gen.prefix(item.token_name)}_${prop} ${value}
82 switch (devinfo->gen) {
145 class Gen(object):
161 gen = self.tenx
163 if gen % 10 == 0:
164 gen //= 10
169 return 'GEN{}_{}'.format(gen, token)
179 def add_gen(self, gen, xml_attrs)
[all...] |
| /xsrc/external/mit/libX11/dist/src/xlibi18n/ |
| lcGeneric.c | 178 XLCdGenericPart *gen)
187 if ((num = gen->codeset_num))
188 new_list = Xreallocarray(gen->codeset_list,
197 gen->codeset_list = new_list;
198 gen->codeset_num = num + 1;
210 XLCdGenericPart *gen,
228 if (gen->mb_parse_table == NULL) {
229 gen->mb_parse_table = Xcalloc(1, 256); /* 2^8 */
230 if (gen->mb_parse_table == NULL)
234 if ((num = gen->mb_parse_list_num)
274 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local
701 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local
1157 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local
[all...] |
| /xsrc/external/mit/MesaLib.old/src/mesa/main/ |
| Makefile | 9 XML= ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_and_es_API.xml
16 ${_out}: ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/${_py} ${XML}
17 ${PYTHON} ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/${_py} -f ${XML} > $@.tmp && mv $@.tmp $@
20 dispatch.h: ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_table.py ${XML}
21 ${PYTHON} ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_table.py -f ${XML} -m remap_table > $@.tmp && mv $@.tmp $@
|
| /xsrc/external/mit/xf86-video-intel/dist/src/ |
| intel_module.c | 58 .gen = -1,
62 .gen = 010,
66 .gen = 020,
69 .gen = 020,
72 .gen = 021,
75 .gen = 022,
79 .gen = 030,
82 .gen = 031,
86 .gen = 033,
90 .gen = 040
428 int gen = 0; local
[all...] |
| /xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/x86emu/ |
| regs.h | 131 #define R_AH gen.A.I8_reg.h_reg
132 #define R_AL gen.A.I8_reg.l_reg
133 #define R_BH gen.B.I8_reg.h_reg
134 #define R_BL gen.B.I8_reg.l_reg
135 #define R_CH gen.C.I8_reg.h_reg
136 #define R_CL gen.C.I8_reg.l_reg
137 #define R_DH gen.D.I8_reg.h_reg
138 #define R_DL gen.D.I8_reg.l_reg
141 #define R_AX gen.A.I16_reg.x_reg
142 #define R_BX gen.B.I16_reg.x_re
264 struct i386_general_regs gen; member in struct:__anon10102
[all...] |
| /xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/x86emu/ |
| regs.h | 120 #define R_AH gen.A.I8_reg.h_reg
121 #define R_AL gen.A.I8_reg.l_reg
122 #define R_BH gen.B.I8_reg.h_reg
123 #define R_BL gen.B.I8_reg.l_reg
124 #define R_CH gen.C.I8_reg.h_reg
125 #define R_CL gen.C.I8_reg.l_reg
126 #define R_DH gen.D.I8_reg.h_reg
127 #define R_DL gen.D.I8_reg.l_reg
130 #define R_AX gen.A.I16_reg.x_reg
131 #define R_BX gen.B.I16_reg.x_re
261 struct i386_general_regs gen; member in struct:__anon10697
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_compiler.c | 88 compiler->gen = fd_dev_gen(dev_id);
98 if (compiler->gen >= 6) {
117 * TODO: is this true on earlier gen's?
121 /* TODO: implement clip+cull distances on earlier gen's */
124 /* TODO: implement private memory on earlier gen's */
139 * earlier gen's.
144 if (compiler->gen >= 6) {
147 } else if (compiler->gen >= 4) {
157 if (compiler->gen >= 6) {
159 } else if (compiler->gen >= 4)
[all...] |
| /xsrc/external/mit/xf86-video-intel/dist/src/sna/ |
| sna_video_hwmc.c | 83 if (sna->kgem.gen >= 040) {
86 if (sna->kgem.gen >= 045)
90 priv->i965.is_g4x = sna->kgem.gen == 045;
92 priv->i965.is_igdng = sna->kgem.gen == 050;
220 if (sna->kgem.gen < 031)
224 if (sna->kgem.gen >= 060)
243 if (sna->kgem.gen >= 045) {
246 } else if (sna->kgem.gen >= 040) {
269 if (sna->kgem.gen >= 045)
271 else if (sna->kgem.gen >= 040
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/ |
| sna_video_hwmc.c | 83 if (sna->kgem.gen >= 040) {
86 if (sna->kgem.gen >= 045)
90 priv->i965.is_g4x = sna->kgem.gen == 045;
92 priv->i965.is_igdng = sna->kgem.gen == 050;
220 if (sna->kgem.gen < 031)
224 if (sna->kgem.gen >= 060)
243 if (sna->kgem.gen >= 045) {
246 } else if (sna->kgem.gen >= 040) {
269 if (sna->kgem.gen >= 045)
271 else if (sna->kgem.gen >= 040
[all...] |
| /xsrc/external/mit/xf86-video-intel-2014/dist/src/ |
| intel_module.c | 58 .gen = -1,
62 .gen = 010,
66 .gen = 020,
69 .gen = 020,
72 .gen = 021,
75 .gen = 022,
79 .gen = 030,
82 .gen = 031,
86 .gen = 033,
90 .gen = 040
361 int gen = 0; local
[all...] |
