Searched refs:gen (Results 1 - 25 of 403) sorted by relevance

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/xsrc/external/mit/libX11/dist/modules/lc/
H A DMakefile.am1 SUBDIRS=Utf8 def gen
/xsrc/external/mit/MesaLib.old/src/intel/genxml/
H A DgenX_bits.h60 switch (devinfo->gen) {
103 switch (devinfo->gen) {
143 switch (devinfo->gen) {
186 switch (devinfo->gen) {
226 switch (devinfo->gen) {
269 switch (devinfo->gen) {
309 switch (devinfo->gen) {
352 switch (devinfo->gen) {
392 switch (devinfo->gen) {
435 switch (devinfo->gen) {
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/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_test.c31 void brw_test_compare(const char *function, int gen, argument
41 brw_disasm(stdout, &new[n], gen);
45 brw_disasm(stdout, &old[n], gen);
H A Dbrw_test.h37 void brw_test_compare(const char *function, int gen,
H A Dbrw_wm.c44 uv = p->gen >= 060 ? 6 : 3;
47 uv = p->gen >= 060 ? 4 : 3;
52 if (p->gen >= 060) {
99 if (p->gen >= 060) {
128 if (p->gen >= 060)
185 if (p->gen < 060) {
200 if (p->gen >= 060) {
222 if (dw == 8 && p->gen >= 060) {
236 if (p->gen >= 060) {
240 } else if (p->gen >
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_test.c31 void brw_test_compare(const char *function, int gen, argument
41 brw_disasm(stdout, &new[n], gen);
45 brw_disasm(stdout, &old[n], gen);
H A Dbrw_test.h37 void brw_test_compare(const char *function, int gen,
H A Dbrw_wm.c44 uv = p->gen >= 060 ? 6 : 3;
47 uv = p->gen >= 060 ? 4 : 3;
52 if (p->gen >= 060) {
99 if (p->gen >= 060) {
128 if (p->gen >= 060)
185 if (p->gen < 060) {
200 if (p->gen >= 060) {
222 if (dw == 8 && p->gen >= 060) {
236 if (p->gen >= 060) {
240 } else if (p->gen >
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/xsrc/external/mit/MesaLib.old/dist/src/intel/genxml/
H A Dgen_bits_header.py75 % for gen, value in sorted(item.iter_prop(prop), reverse=True):
76 #define ${gen.prefix(item.token_name)}_${prop} ${value}
82 switch (devinfo->gen) {
161 gen = self.tenx
163 if gen % 10 == 0:
164 gen //= 10
169 return 'GEN{}_{}'.format(gen, token)
179 def add_gen(self, gen, xml_attrs):
180 assert isinstance(gen, Gen)
182 self.length_by_gen[gen]
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/xsrc/external/mit/MesaLib/dist/src/intel/genxml/
H A Dgen_bits_header.py71 % for gen, value in sorted(item.iter_prop(prop), reverse=True):
72 #define ${gen.prefix(item.token_name)}_${prop} ${value}
139 gen = self.tenx
141 if gen % 10 == 0:
142 gen //= 10
147 return 'GFX{}_{}'.format(gen, token)
157 def add_gen(self, gen, xml_attrs):
158 assert isinstance(gen, Gen)
160 self.length_by_gen[gen] = xml_attrs['length']
183 def get_prop(self, prop, gen)
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/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dgen8_multisample_state.c40 assert(devinfo->gen == 10);
58 assert(devinfo->gen == 10);
79 if (devinfo->gen == 10)
102 if (devinfo->gen == 10)
H A Dbrw_pipe_control.c41 if (devinfo->gen >= 6 &&
95 assert(devinfo->gen >= 6);
102 if (devinfo->gen >= 8)
123 assert(devinfo->gen == 7);
274 if (devinfo->gen >= 6) {
358 if (devinfo->gen >= 6) {
374 switch (devinfo->gen) {
405 if (devinfo->gen < 6)
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_inst.h79 if (devinfo->gen >= 8) { \
81 } else if (devinfo->gen >= 7) { \
83 } else if (devinfo->gen >= 6) { \
85 } else if (devinfo->gen >= 5) { \
177 FC(branch_control, 28, 28, devinfo->gen >= 8)
178 FC(acc_wr_control, 28, 28, devinfo->gen >= 6)
179 FC(mask_control_ex, 28, 28, devinfo->is_g4x || devinfo->gen == 5)
181 FC(math_function, 27, 24, devinfo->gen >= 6)
278 FC(3src_a1_src2_subreg_nr, 117, 113, devinfo->gen >= 10)
279 FC(3src_a1_src2_hstride, 112, 111, devinfo->gen >
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H A Dbrw_compiler.c103 if (devinfo->gen >= 10) {
109 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_VS", true);
111 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TCS", true);
113 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TES", true);
115 devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_GS", true);
153 if (devinfo->gen < 8 || devinfo->gen > 9)
160 devinfo->gen < 6 ? 16 : UINT_MAX;
176 if (devinfo->gen >= 11) {
182 if (devinfo->gen <
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H A Dbrw_eu.h259 if (devinfo->gen >= 5) {
272 if (devinfo->gen >= 5)
281 if (devinfo->gen >= 5)
291 assert(devinfo->gen >= 5);
323 if (devinfo->gen >= 7)
326 else if (devinfo->gen >= 5)
352 if (devinfo->gen >= 7)
354 else if (devinfo->gen >= 5 || devinfo->is_g4x)
363 assert(devinfo->gen >= 5);
364 if (devinfo->gen >
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/xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
H A Disl_storage_image.c110 return (devinfo->gen >= 9 ? format :
111 devinfo->gen >= 8 || devinfo->is_haswell ?
127 return (devinfo->gen >= 9 ? format :
128 devinfo->gen >= 8 || devinfo->is_haswell ?
134 return (devinfo->gen >= 9 ? format :
135 devinfo->gen >= 8 || devinfo->is_haswell ?
140 return (devinfo->gen >= 9 ? format :
141 devinfo->gen >= 8 || devinfo->is_haswell ?
147 return (devinfo->gen >= 9 ? format : ISL_FORMAT_R16_UINT);
151 return (devinfo->gen >
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/xsrc/external/mit/libX11/dist/src/xlibi18n/
H A DlcGeneric.c178 XLCdGenericPart *gen)
187 if ((num = gen->codeset_num))
188 new_list = Xreallocarray(gen->codeset_list,
197 gen->codeset_list = new_list;
198 gen->codeset_num = num + 1;
210 XLCdGenericPart *gen,
228 if (gen->mb_parse_table == NULL) {
229 gen->mb_parse_table = Xcalloc(1, 256); /* 2^8 */
230 if (gen->mb_parse_table == NULL)
234 if ((num = gen
177 add_codeset(XLCdGenericPart * gen) argument
209 add_parse_list(XLCdGenericPart * gen,EncodingType type,const char * encoding,CodeSet codeset) argument
274 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local in function:free_charset
422 read_charset_define(XLCd lcd,XLCdGenericPart * gen) argument
538 add_conversion(XLCdGenericPart * gen) argument
562 read_segmentconversion(XLCd lcd,XLCdGenericPart * gen) argument
701 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local in function:load_generic
1107 destroy_CodeSetList(XLCdGenericPart * gen) argument
1130 destroy_SegConv(XLCdGenericPart * gen) argument
1157 XLCdGenericPart *gen = XLC_GENERIC_PART(lcd); local in function:destroy_gen
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/xsrc/external/mit/MesaLib.old/src/mesa/main/
H A DMakefile9 XML= ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_and_es_API.xml
16 ${_out}: ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/${_py} ${XML}
17 ${PYTHON} ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/${_py} -f ${XML} > $@.tmp && mv $@.tmp $@
20 dispatch.h: ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_table.py ${XML}
21 ${PYTHON} ${X11SRCDIR.MesaLib}/src/mapi/glapi/gen/gl_table.py -f ${XML} -m remap_table > $@.tmp && mv $@.tmp $@
/xsrc/external/mit/xf86-video-intel/dist/src/
H A Dintel_module.c58 .gen = -1,
62 .gen = 010,
66 .gen = 020,
69 .gen = 020,
72 .gen = 021,
75 .gen = 022,
79 .gen = 030,
82 .gen = 031,
86 .gen = 033,
90 .gen
428 int gen = 0; local in function:intel_detect_chipset
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/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h120 #define R_AH gen.A.I8_reg.h_reg
121 #define R_AL gen.A.I8_reg.l_reg
122 #define R_BH gen.B.I8_reg.h_reg
123 #define R_BL gen.B.I8_reg.l_reg
124 #define R_CH gen.C.I8_reg.h_reg
125 #define R_CL gen.C.I8_reg.l_reg
126 #define R_DH gen.D.I8_reg.h_reg
127 #define R_DL gen.D.I8_reg.l_reg
130 #define R_AX gen.A.I16_reg.x_reg
131 #define R_BX gen
261 struct i386_general_regs gen; member in struct:__anon45d21a7d0808
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/xsrc/external/mit/xorg-server/dist/hw/xfree86/x86emu/x86emu/
H A Dregs.h131 #define R_AH gen.A.I8_reg.h_reg
132 #define R_AL gen.A.I8_reg.l_reg
133 #define R_BH gen.B.I8_reg.h_reg
134 #define R_BL gen.B.I8_reg.l_reg
135 #define R_CH gen.C.I8_reg.h_reg
136 #define R_CL gen.C.I8_reg.l_reg
137 #define R_DH gen.D.I8_reg.h_reg
138 #define R_DL gen.D.I8_reg.l_reg
141 #define R_AX gen.A.I16_reg.x_reg
142 #define R_BX gen
264 struct i386_general_regs gen; member in struct:__anon2b313d700808
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/xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/
H A Dir3_compiler.c88 compiler->gen = fd_dev_gen(dev_id);
98 if (compiler->gen >= 6) {
117 * TODO: is this true on earlier gen's?
121 /* TODO: implement clip+cull distances on earlier gen's */
124 /* TODO: implement private memory on earlier gen's */
139 * earlier gen's.
144 if (compiler->gen >= 6) {
147 } else if (compiler->gen >= 4) {
157 if (compiler->gen >= 6) {
159 } else if (compiler->gen >
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/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dsna_video_hwmc.c83 if (sna->kgem.gen >= 040) {
86 if (sna->kgem.gen >= 045)
90 priv->i965.is_g4x = sna->kgem.gen == 045;
92 priv->i965.is_igdng = sna->kgem.gen == 050;
220 if (sna->kgem.gen < 031)
224 if (sna->kgem.gen >= 060)
243 if (sna->kgem.gen >= 045) {
246 } else if (sna->kgem.gen >= 040) {
269 if (sna->kgem.gen >= 045)
271 else if (sna->kgem.gen >
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dsna_video_hwmc.c83 if (sna->kgem.gen >= 040) {
86 if (sna->kgem.gen >= 045)
90 priv->i965.is_g4x = sna->kgem.gen == 045;
92 priv->i965.is_igdng = sna->kgem.gen == 050;
220 if (sna->kgem.gen < 031)
224 if (sna->kgem.gen >= 060)
243 if (sna->kgem.gen >= 045) {
246 } else if (sna->kgem.gen >= 040) {
269 if (sna->kgem.gen >= 045)
271 else if (sna->kgem.gen >
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/xsrc/external/mit/xf86-video-intel-2014/dist/src/
H A Dintel_module.c58 .gen = -1,
62 .gen = 010,
66 .gen = 020,
69 .gen = 020,
72 .gen = 021,
75 .gen = 022,
79 .gen = 030,
82 .gen = 031,
86 .gen = 033,
90 .gen
361 int gen = 0; local in function:intel_detect_chipset
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