Searched refs:index_reg (Results 1 - 25 of 25) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Datombios_output.c1032 int index_reg = 0x6578, data_reg = 0x657c; local in function:atom_rv515_force_tv_scaler
1034 index_reg += radeon_crtc->crtc_offset;
1044 OUTREG(index_reg,0x0);
1046 OUTREG(index_reg,0x1);
1048 OUTREG(index_reg,0x2);
1050 OUTREG(index_reg,0x100);
1052 OUTREG(index_reg,0x101);
1054 OUTREG(index_reg,0x102);
1056 OUTREG(index_reg,0x200);
1058 OUTREG(index_reg,
[all...]
/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Di2c_acc.c148 unsigned short index_reg, data_reg; variable in typeref:typename:unsigned short
255 index_reg = INDEX_1;
261 index_reg = INDEX_2;
280 OUTB(index_reg, reg);
295 OUTB(index_reg, reg);
/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Di2c_acc.c47 unsigned short index_reg, data_reg; variable in typeref:typename:unsigned short
142 index_reg = INDEX_1;
148 index_reg = INDEX_2;
167 OUTB(index_reg, reg);
182 OUTB(index_reg, reg);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/
H A Dsfn_instruction_export.h160 unsigned index_reg() const {return m_index->sel();} function in class:r600::MemRingOutIntruction
H A Dsfn_ir_to_assembly.cpp621 output.index_gpr = instr.index_reg();
1080 m_bc->index_reg[idx] != addr.sel()
1126 m_bc->index_reg[idx] = addr.sel();
1147 if (m_bc->index_reg[1] == dst.sel &&
1151 if (m_bc->index_reg[0] == dst.sel &&
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600_asm.h274 unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */ member in struct:r600_bytecode
H A Deg_asm.c191 alu.src[0].sel = bc->index_reg[id];
H A Dr600_shader.c841 return index > 0 ? ctx->bc->index_reg[index - 1] : ctx->bc->ar_reg;
1852 /* pull the value from index_reg */
1975 /* pull the value from index_reg */
2015 /* pull the value from index_reg */
3549 ctx.bc->index_reg[0] = ++regno;
3550 ctx.bc->index_reg[1] = ++regno;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_asm.h280 unsigned index_reg[2]; /* indexing register CF_INDEX_[01] */ member in struct:r600_bytecode
H A Deg_asm.c191 alu.src[0].sel = bc->index_reg[id];
H A Dr600_shader.c929 return index > 0 ? ctx->bc->index_reg[index - 1] : ctx->bc->ar_reg;
1940 /* pull the value from index_reg */
2063 /* pull the value from index_reg */
2103 /* pull the value from index_reg */
3638 ctx.bc->index_reg[0] = ++regno;
3639 ctx.bc->index_reg[1] = ++regno;
/xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/
H A Dmidgard_address.c273 ins->load_store.index_reg = REGISTER_LDST_ZERO;
H A Ddisassemble.c1430 print_ldst_read_reg(fp, word->index_reg);
1452 word->index_reg != 0x7) {
1456 print_ldst_read_reg(fp, word->index_reg);
1488 print_ldst_read_reg(fp, word->index_reg);
1495 print_ldst_read_reg(fp, word->index_reg);
1530 if (word->index_reg == 0x7 && ctx->midg_stats.varying_count >= 0)
1536 if (word->index_reg == 0x7 && ctx->midg_stats.attribute_count >= 0)
H A Dmidgard_compile.c1191 ins.load_store.index_reg = REGISTER_LDST_ZERO;
1366 ins.load_store.index_reg = REGISTER_LDST_ZERO;
1453 ins.load_store.index_reg = REGISTER_LDST_ZERO;
1468 ins.load_store.index_reg = REGISTER_LDST_ZERO;
1624 ld.load_store.index_reg = REGISTER_LDST_ZERO;
1814 ld.load_store.index_reg = target >> 2;
1830 ld.load_store.index_reg = REGISTER_LDST_ZERO;
1850 ld.load_store.index_reg = index >> 2;
1861 ld.load_store.index_reg = REGISTER_LDST_ZERO;
1942 st.load_store.index_reg
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H A Dcompiler.h585 .index_reg = REGISTER_LDST_ZERO,
H A Dmidgard_emit.c628 ldst.index_reg = SSA_REG_FROM_FIXED(ins->src[2]) - REGISTER_LDST_BASE;
630 ldst.index_comp = midgard_ldst_comp(ldst.index_reg, ins->swizzle[2][0], sz);
H A Dmidgard.h758 * For cmpxchg, index_reg is used for the comparison value.
763 unsigned index_reg : 3; member in struct:__anon60a087ed1c08
H A Dmidgard_ra.c1056 .index_reg = REGISTER_LDST_ZERO,
/xsrc/external/mit/MesaLib.old/dist/src/mesa/program/
H A Dir_to_mesa.cpp1550 src_reg index_reg; local in function:ir_to_mesa_visitor::visit
1553 index_reg = this->result;
1555 index_reg = get_temp(glsl_type::float_type);
1557 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1568 index_reg, *src.reladdr);
1570 index_reg = accum_reg;
1574 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
/xsrc/external/mit/MesaLib/dist/src/mesa/program/
H A Dir_to_mesa.cpp1487 src_reg index_reg; local in function:ir_to_mesa_visitor::visit
1490 index_reg = this->result;
1492 index_reg = get_temp(glsl_type::float_type);
1494 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1505 index_reg, *src.reladdr);
1507 index_reg = accum_reg;
1511 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_glsl_to_tgsi.cpp2035 st_src_reg index_reg = get_temp(glsl_type::uint_type); local in function:glsl_to_tgsi_visitor::visit_expression
2082 emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), offset,
2085 *cbuf.reladdr = index_reg;
2814 st_src_reg index_reg; local in function:glsl_to_tgsi_visitor::visit
2817 index_reg = this->result;
2819 index_reg = get_temp(native_integers ?
2822 emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2823 this->result, st_src_reg_for_type(index_reg.type, element_size));
2834 index_reg, *src.reladdr);
2836 index_reg
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/xsrc/external/mit/MesaLib/dist/src/mesa/state_tracker/
H A Dst_glsl_to_tgsi.cpp2108 st_src_reg index_reg = get_temp(glsl_type::uint_type); local in function:glsl_to_tgsi_visitor::visit_expression
2155 emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), offset,
2158 *cbuf.reladdr = index_reg;
2904 st_src_reg index_reg; local in function:glsl_to_tgsi_visitor::visit
2907 index_reg = this->result;
2909 index_reg = get_temp(native_integers ?
2912 emit_asm(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg),
2913 this->result, st_src_reg_for_type(index_reg.type, element_size));
2924 index_reg, *src.reladdr);
2926 index_reg
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_vec4_visitor.cpp797 dst_reg index_reg = retype(byte_offset(dst_reg(header), REG_SIZE), local in function:brw::vec4_visitor::emit_pull_constant_load_reg
799 pull = MOV(writemask(index_reg, WRITEMASK_X), offset_reg);
H A Dbrw_vec4_generator.cpp821 struct brw_reg index_reg = brw_vec1_grf( local in function:generate_tcs_input_urb_offsets
825 retype(index_reg, BRW_REGISTER_TYPE_UD));
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_vec4_generator.cpp820 struct brw_reg index_reg = brw_vec1_grf( local in function:generate_tcs_input_urb_offsets
824 retype(index_reg, BRW_REGISTER_TYPE_UD));

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