Searched refs:is_baytrail (Results 1 - 25 of 37) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/intel/common/
H A Dgen_l3_config.c159 return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs);
260 w.w[GEN_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
H A Dgen_decoder.c501 if (devinfo->is_baytrail || devinfo->is_haswell) {
/xsrc/external/mit/MesaLib.old/dist/src/intel/dev/
H A Dgen_device_info.h54 bool is_baytrail; member in struct:gen_device_info
H A Dgen_device_info.c281 GEN7_FEATURES, .is_baytrail = true, .gt = 1,
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dgen7_l3_state.c138 const bool urb_low_bw = has_slm && !devinfo->is_baytrail;
142 const unsigned n0_urb = (devinfo->is_baytrail ? 32 : 0);
151 devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT :
H A Dgen7_urb.c176 if (devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail)
255 if (devinfo->gen == 7 && !devinfo->is_haswell && !devinfo->is_baytrail)
H A Dintel_extensions.c287 if (devinfo->gen >= 8 || devinfo->is_haswell || devinfo->is_baytrail) {
295 if (devinfo->gen >= 8 || devinfo->is_baytrail) {
H A Dintel_mipmap_tree.h733 return devinfo->gen < 8 && !devinfo->is_baytrail && is_etc;
H A Dbrw_draw_upload.c257 devinfo->gen <= 7 && !devinfo->is_baytrail && !devinfo->is_haswell;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dgfx7_l3_state.c139 const bool urb_low_bw = has_slm && !devinfo->is_baytrail;
143 const unsigned n0_urb = (devinfo->is_baytrail ? 32 : 0);
152 devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT :
H A Dgfx7_urb.c175 if (devinfo->verx10 <= 70 && !devinfo->is_baytrail)
254 if (devinfo->verx10 == 70 && !devinfo->is_baytrail)
H A Dbrw_extensions.c297 if (devinfo->verx10 >= 75 || devinfo->is_baytrail) {
305 if (devinfo->ver >= 8 || devinfo->is_baytrail) {
H A Dbrw_mipmap_tree.h723 return devinfo->ver < 8 && !devinfo->is_baytrail && is_etc;
H A Dbrw_draw_upload.c257 devinfo->verx10 <= 70 && !devinfo->is_baytrail;
/xsrc/external/mit/MesaLib/dist/src/intel/dev/
H A Dintel_device_info.h60 bool is_baytrail; member in struct:intel_device_info
H A Dintel_device_info.c283 GFX7_FEATURES, .is_baytrail = true, .gt = 1,
/xsrc/external/mit/MesaLib/dist/src/intel/common/
H A Dintel_l3_config.c168 return (devinfo->is_baytrail ? &vlv_l3_list : &ivb_l3_list);
272 w.w[INTEL_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_state.c418 const bool urb_low_bw = cfg->n[INTEL_L3P_SLM] && !devinfo->is_baytrail;
422 const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
434 devinfo->is_baytrail ? BYT_SQGPCI_DEFAULT : SQGPCI_DEFAULT;
/xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
H A Disl_format.c416 if (devinfo->is_baytrail) {
449 if (devinfo->is_baytrail) {
485 if (devinfo->is_baytrail)
H A Disl.h84 #define ISL_DEV_IS_BAYTRAIL(__dev) ((__dev)->info->is_baytrail)
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_nir_lower_image_load_store.c257 if (devinfo->gen < 8 && !devinfo->is_baytrail) {
H A Dbrw_vec4_generator.cpp742 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
1062 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_nir_lower_storage_image.c203 if (devinfo->ver < 8 && !devinfo->is_baytrail) {
H A Dbrw_vec4_generator.cpp741 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
1061 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
/xsrc/external/mit/MesaLib/dist/src/intel/isl/
H A Disl_format.c716 if (devinfo->is_baytrail) {
777 if (devinfo->is_baytrail)

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