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    Searched refs:is_baytrail (Results 1 - 25 of 37) sorted by relevancy

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  /xsrc/external/mit/MesaLib.old/dist/src/intel/common/
gen_l3_config.c 159 return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs);
260 w.w[GEN_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
  /xsrc/external/mit/MesaLib.old/dist/src/intel/dev/
gen_device_info.h 54 bool is_baytrail; member in struct:gen_device_info
gen_device_info.c 281 GEN7_FEATURES, .is_baytrail = true, .gt = 1,
  /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
gfx7_l3_state.c 139 const bool urb_low_bw = has_slm && !devinfo->is_baytrail;
143 const unsigned n0_urb = (devinfo->is_baytrail ? 32 : 0);
152 devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT :
gfx7_urb.c 175 if (devinfo->verx10 <= 70 && !devinfo->is_baytrail)
254 if (devinfo->verx10 == 70 && !devinfo->is_baytrail)
brw_extensions.c 297 if (devinfo->verx10 >= 75 || devinfo->is_baytrail) {
305 if (devinfo->ver >= 8 || devinfo->is_baytrail) {
brw_mipmap_tree.h 723 return devinfo->ver < 8 && !devinfo->is_baytrail && is_etc;
brw_draw_upload.c 257 devinfo->verx10 <= 70 && !devinfo->is_baytrail;
  /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
gen7_l3_state.c 138 const bool urb_low_bw = has_slm && !devinfo->is_baytrail;
142 const unsigned n0_urb = (devinfo->is_baytrail ? 32 : 0);
151 devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT :
gen7_urb.c 176 if (devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail)
255 if (devinfo->gen == 7 && !devinfo->is_haswell && !devinfo->is_baytrail)
intel_extensions.c 287 if (devinfo->gen >= 8 || devinfo->is_haswell || devinfo->is_baytrail) {
295 if (devinfo->gen >= 8 || devinfo->is_baytrail) {
intel_mipmap_tree.h 733 return devinfo->gen < 8 && !devinfo->is_baytrail && is_etc;
brw_draw_upload.c 257 devinfo->gen <= 7 && !devinfo->is_baytrail && !devinfo->is_haswell;
  /xsrc/external/mit/MesaLib/dist/src/intel/dev/
intel_device_info.h 60 bool is_baytrail; member in struct:intel_device_info
intel_device_info.c 283 GFX7_FEATURES, .is_baytrail = true, .gt = 1,
  /xsrc/external/mit/MesaLib/dist/src/intel/common/
intel_l3_config.c 168 return (devinfo->is_baytrail ? &vlv_l3_list : &ivb_l3_list);
272 w.w[INTEL_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0;
  /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
genX_state.c 418 const bool urb_low_bw = cfg->n[INTEL_L3P_SLM] && !devinfo->is_baytrail;
422 const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
434 devinfo->is_baytrail ? BYT_SQGPCI_DEFAULT : SQGPCI_DEFAULT;
  /xsrc/external/mit/MesaLib.old/dist/src/intel/isl/
isl_format.c 416 if (devinfo->is_baytrail) {
449 if (devinfo->is_baytrail) {
485 if (devinfo->is_baytrail)
isl.h 84 #define ISL_DEV_IS_BAYTRAIL(__dev) ((__dev)->info->is_baytrail)
  /xsrc/external/mit/MesaLib/dist/src/intel/compiler/
brw_nir_lower_storage_image.c 203 if (devinfo->ver < 8 && !devinfo->is_baytrail) {
brw_vec4_generator.cpp 741 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
1061 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
  /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
brw_nir_lower_image_load_store.c 257 if (devinfo->gen < 8 && !devinfo->is_baytrail) {
brw_vec4_generator.cpp 742 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
1062 const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail;
  /xsrc/external/mit/MesaLib/dist/src/intel/isl/
isl_format.c 716 if (devinfo->is_baytrail) {
777 if (devinfo->is_baytrail)
isl.h 88 #define ISL_DEV_IS_BAYTRAIL(__dev) ((__dev)->info->is_baytrail)

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