Searched refs:late_alloc_wave64 (Results 1 - 4 of 4) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| H A D | ac_shader_util.c | 451 bool uses_scratch, unsigned *late_alloc_wave64, unsigned *cu_mask) 453 *late_alloc_wave64 = 0; /* The limit is per SA. */ 475 *late_alloc_wave64 = info->min_good_cu_per_sa * 10; 477 *late_alloc_wave64 = info->min_good_cu_per_sa * 4; 481 *late_alloc_wave64 = MIN2(*late_alloc_wave64, 64); 497 *late_alloc_wave64 = 2; 501 *late_alloc_wave64 = (info->min_good_cu_per_sa - 2) * 4; 505 if (*late_alloc_wave64 > 2) 511 *late_alloc_wave64 450 ac_compute_late_alloc(const struct radeon_info * info,bool ngg,bool ngg_culling,bool uses_scratch,unsigned * late_alloc_wave64,unsigned * cu_mask) argument [all...] |
| H A D | ac_shader_util.h | 106 bool uses_scratch, unsigned *late_alloc_wave64, unsigned *cu_mask);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state_shaders.c | 1211 unsigned late_alloc_wave64, cu_mask; local in function:gfx10_shader_ngg 1215 &late_alloc_wave64, &cu_mask); 1238 S_00B204_CU_EN(0xffff) | S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(late_alloc_wave64); 1307 late_alloc_wave64 ? (sscreen->info.pc_lines / 4) * oversub_pc_factor : 0; 1492 unsigned late_alloc_wave64, cu_mask; local in function:si_shader_vs 1495 &late_alloc_wave64, &cu_mask); 1497 shader->ctx_reg.vs.ge_pc_alloc = S_030980_OVERSUB_EN(late_alloc_wave64 > 0) | 1506 si_pm4_set_reg(pm4, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(late_alloc_wave64));
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_pipeline.c | 4456 unsigned late_alloc_wave64, cu_mask; local in function:radv_pipeline_generate_hw_vs 4458 shader->config.scratch_bytes_per_wave > 0, &late_alloc_wave64, &cu_mask); 4463 radeon_set_sh_reg(cs, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(late_alloc_wave64)); 4466 uint32_t oversub_pc_lines = late_alloc_wave64 ? pipeline->device->physical_device->rad_info.pc_lines / 4 : 0; 4619 unsigned late_alloc_wave64, cu_mask; local in function:radv_pipeline_generate_hw_ngg 4621 shader->config.scratch_bytes_per_wave > 0, &late_alloc_wave64, &cu_mask); 4628 S_00B204_CU_EN(0xffff) | S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(late_alloc_wave64)); 4630 uint32_t oversub_pc_lines = late_alloc_wave64 ? pipeline->device->physical_device->rad_info.pc_lines / 4 : 0;
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