| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| H A D | xgi_dac.c | 494 const int mclk = pXGI->MemClock; local in function:XG40_MemBandWidth 497 float total = (mclk * bus) / bpp; 499 PDEBUG5(ErrorF("mclk: %d, bus: %d, magic: %f, bpp: %d\n", 500 mclk, bus, magic, bpp)); 521 const int mclk = pXGI->MemClock; local in function:XG20_MemBandWidth 524 float total = (mclk * bus) / bpp; 529 PDEBUG5(ErrorF("mclk: %d, bus: %d, magic: %f, bpp: %d\n", 530 mclk, bus, magic, bpp)); 532 total = mclk*bus/bpp; 722 int mclk; local in function:XG40Mclk [all...] |
| /xsrc/external/mit/xf86-video-s3/dist/src/ |
| H A D | s3_Trio64DAC.c | 284 int m, n, n1, n2, mclk; local in function:S3Trio64DAC_PreInit 298 mclk = ((1431818 * (m+2)) / (n1+2) / (1<<n2)+50)/100; 304 mclk /= ((SR27 >> 2) & 0x03) + 1; 306 pS3->mclk = mclk; 312 mclk / 1000.0);
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| H A D | s3_GENDAC.c | 160 int m, n, n1, n2, mclk; local in function:S3GENDAC_PreInit 176 mclk = ((1431818 * (m + 2)) / (n1 + 2) / (1 << n2) + 50) / 100; 178 pS3->mclk = mclk; 180 mclk / 1000.0);
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| H A D | s3_IBMRGB.c | 274 int m, n, df, mclk=0; local in function:S3IBMRGB_PreInit 284 mclk = ((pS3->RefClock*100 * (m+65)) / n / (8 >> df) + 50) / 100; 285 pS3->mclk = mclk; 287 mclk / 1000.0);
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| H A D | s3_Ti.c | 322 int mclk, m, n, p, mcc, cr5c; local in function:S3TiDAC_PreInit 340 mclk = ((1431818 * ((m+2) * 8)) / (n+2) / (1 << p) / mcc + 50) / 100; 341 pS3->mclk = mclk; 343 mclk / 1000.0);
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| H A D | s3.h | 159 int mclk, MaxClock; member in struct:_S3Rec
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| H A D | s3_driver.c | 1519 int clock2, mclk; local in function:S3ModeInit 1524 mclk = pS3->mclk; 1525 m = (int)((mclk/1000.0*.72+16.867)*89.736/(clock2/1000.0+39)-21.1543);
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| /xsrc/external/mit/xf86-video-siliconmotion/dist/src/ |
| H A D | smi_501.c | 455 double diff, best, mclk; local in function:SMI501_FindClock 464 for (multiplier = 12, mclk = multiplier * 24 * 1000.0; 465 mclk <= 14 * 24 * 1000.0; 466 multiplier += 2, mclk = multiplier * 24 * 1000.0) { 471 diff = (mclk / (divider << shift << xclck)) - clock; 475 *x2_select = mclk == 12 * 24 * 1000.0 ? 0 : 1; 500 double diff, best, mclk; local in function:SMI501_FindMemClock 504 for (multiplier = 12, mclk = multiplier * 24 * 1000.0; 505 mclk <= 14 * 24 * 1000.0; 506 multiplier += 2, mclk [all...] |
| H A D | smi_driver.c | 1140 int mclk, mxclk; local in function:SMI_DetectMCLK 1174 mclk = pSmi->MCLK; 1186 mclk = ((clock.f.m_select ? 336 : 288) / 1206 mclk = ((1431818 * m) / n / shift + 50) / 100; 1210 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MCLK = %1.3f\n", mclk / 1000.0);
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_pm.c | 797 info->pm.mode[0].mclk = (uint32_t)info->mclk * 100; /* 10 khz */ 806 info->pm.mode[1].mclk = info->pm.mode[0].mclk / 4; 811 info->pm.mode[2].mclk = info->pm.mode[0].mclk; 828 info->pm.mode[2].mclk = info->pm.mode[0].mclk / 2; 833 info->pm.mode[1].mclk = info->pm.mode[0].mclk / [all...] |
| H A D | legacy_crtc.c | 1418 mem_bw = info->mclk * (info->RamWidth / 8) * (info->IsDDR ? 2 : 1); 1573 info->mclk) + (4.0 / sclk_eff); 1578 cur_latency_mclk = (mem_trp + MAX(mem_tras, (mem_trcd + 2*(cur_size - (info->IsDDR+1))))) / info->mclk; 1708 read_return_rate = MIN(info->sclk, info->mclk*(info->RamWidth*(info->IsDDR+1)/128));
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| H A D | radeon_bios.c | 1017 info->mclk = RADEON_BIOS16(pll_info_block + 8) / 100.0; 1021 if (info->mclk == 0) info->mclk = 200; 1026 "sclk: %f, mclk: %f\n", 1029 (unsigned)pll->pll_in_max, pll->xclk, info->sclk, info->mclk);
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| H A D | atombios_crtc.c | 1180 float mclk = 1000 / info->igp_sideport_mclk; local in function:RADEONInitDispBandwidthAVIVO 1181 read_delay_latency = 370 * mclk * 800;
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| H A D | radeon.h | 430 uint32_t mclk; member in struct:__anonb194aea90a08 862 float mclk; /* in MHz */ member in struct:__anonb194aea90e08
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| H A D | radeon_driver.c | 1174 case 1: info->mclk = mpll; break; 1175 case 2: info->mclk = mpll / 2.0; break; 1176 case 3: info->mclk = mpll / 4.0; break; 1177 case 4: info->mclk = mpll / 8.0; break; 1178 case 7: info->mclk = spll; break; 1180 info->mclk = 200.00; 1207 "sclk: %f Mhz, mclk: %f Mhz\n", xtal/100.0, info->sclk, info->mclk); 1265 info->mclk = 200.00;
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| /xsrc/external/mit/xf86-video-sis/dist/src/ |
| H A D | sis_dac.c | 1282 /* Not for 530/620 if UMA (on these, the mclk is stored in SR10) */ 1286 int mclk=0; local in function:SiSMclk 1307 mclk = 14318 * ((Num & 0x7f) + 1); 1311 mclk = mclk / ((Denum & 0x1f) + 1); 1314 if((Num & 0x80) != 0) mclk *= 2; 1318 mclk = mclk / (((Denum & 0x60) >> 5) + 1); 1320 mclk = mclk / ((((Denu 1440 int mclk = pSiS->MemClock; local in function:SiSMemBandWidth [all...] |
| H A D | sis_setup.c | 73 CARD16 mclk; member in struct:_sis6326mclk 294 pSiS->MemClock = SiS6326MCLK[i].mclk;
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| H A D | sis_vga.c | 181 int mclk = pSiS->MemClock; local in function:SISInit 660 mclk = 14318 * ((pReg->sisRegs3C4[0x28] & 0x7f) + 1); 661 mclk /= ((pReg->sisRegs3C4[0x29] & 0x0f) + 1); 663 mclk /= (((pReg->sisRegs3C4[0x29] & 0x60) >> 5) + 1); 665 if((pReg->sisRegs3C4[0x29] & 0x60) == 0x40) mclk /= 6; 666 if((pReg->sisRegs3C4[0x29] & 0x60) == 0x60) mclk /= 8; 670 mclk/1000.0); 707 b = (mclk / 1000) * 999488.0 * (buswidth / 8); 723 (mclk == 100000) &&
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| /xsrc/external/mit/xf86-video-i128/dist/src/ |
| H A D | i128_driver.c | 445 float mclk; local in function:I128PreInit 877 mclk = ((1431818 * ((m+2) * 8)) / (n+2) / (1 << p) / mdc + 50) / 100; 881 mclk / 1000.0); 908 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 920 mclk / 1000.0); 942 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 954 mclk / 1000.0); 974 mclk = ((3750000 * (m+65)) / n / (8>>df) + 50) / 100; 994 mclk / 1000.0);
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| /xsrc/external/mit/xf86-video-tseng/dist/src/ |
| H A D | tseng_mode.c | 756 int mclk; local in function:TsengRAMDACProbe 762 mclk = (ET6000IORead(pTseng, 0x69) + 2) * 14318; 764 mclk /= ((dbyte & 0x1f) + 2) * (1 << ((dbyte >> 5) & 0x03)); 765 pTseng->MemClk = mclk;
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| /xsrc/external/mit/libdrm/dist/include/drm/ |
| H A D | amdgpu_drm.h | 1223 __u32 mclk; member in struct:drm_amdgpu_info_vce_clock_table_entry
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| /xsrc/external/mit/MesaLib/dist/include/drm-uapi/ |
| H A D | amdgpu_drm.h | 1088 __u32 mclk; member in struct:drm_amdgpu_info_vce_clock_table_entry
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| /xsrc/external/mit/xf86-video-chips/dist/src/ |
| H A D | ct_driver.c | 2168 int mclk = (int)(real * 1000.0); local in function:chipsPreInitHiQV 2169 if (mclk <= MemClk->Max) { 2172 (float)(mclk/1000.)); 2177 if ((mclk - MemClk->ProbedClk) > 50U) { 2180 MemClk->Clk = mclk; 2193 (float)(mclk/1000.), 3580 int mclk = (int)(real * 1000.0); local in function:chipsPreInit655xx 3581 if (mclk <= cPtr->MemClock.Max) { 3584 (float)(mclk/1000.)); 3585 cPtr->MemClock.Clk = mclk; [all...] |
| /xsrc/external/mit/xf86-video-s3virge/dist/src/ |
| H A D | s3v_driver.c | 485 int mclk; local in function:S3VPreInit 1122 mclk = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; 1141 if (mclk > 60000) 1153 mclk = (int)(mclk * ps3v->refclk_fact); 1158 mclk / 1000.0); 2766 * relative penalty of 3 or 4 mclk's needed to setup memory transfers. 3152 /* gx2 primary mclk timeout, def=0xb */ 3154 /* gx2 secondary mclk timeout, def=0xb */
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| /xsrc/external/mit/xf86-video-trident/dist/src/ |
| H A D | trident_driver.c | 1860 float mclk; local in function:TRIDENTPreInit 3047 mclk = CalculateMCLK(pScrn); 3048 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory Clock is %3.2f MHz\n", mclk);
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