| /xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/chip/r800/ |
| si_gb_reg.h | 107 unsigned int pipe_config : 5; member in struct:_GB_TILE_MODE_T
140 unsigned int pipe_config : 5; member in struct:_GB_TILE_MODE_T
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/chip/r800/ |
| si_gb_reg.h | 107 unsigned int pipe_config : 5; member in struct:_GB_TILE_MODE_T
137 unsigned int pipe_config : 5; member in struct:_GB_TILE_MODE_T
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| tu_util.c | 184 assert(max_pipe_count <= ARRAY_SIZE(fb->pipe_config));
198 fb->pipe_config[n] = A6XX_VSC_PIPE_CONFIG_REG_X(pipe_x) |
206 memset(fb->pipe_config + used_pipe_count, 0,
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| tu_private.h | 1575 uint32_t pipe_config[MAX_VSC_PIPES]; member in struct:tu_framebuffer
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_dma.c | 112 unsigned pipe_config; local
151 pipe_config = G_009910_PIPE_CONFIG(tile_mode);
169 radeon_emit(cs, (slice_tile_max << 0) | (pipe_config << 26));
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| si_texture.c | 361 surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
646 md.u.legacy.pipe_config = surface->u.legacy.pipe_config;
1126 tex->surface.u.legacy.tile_split, tex->surface.u.legacy.pipe_config,
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| ac_surface.h | 100 unsigned pipe_config:5; /* max 17 */ member in struct:legacy_surf_layout
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| ac_surface.c | 513 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
787 AddrTileInfoIn.pipeConfig = surf->u.legacy.pipe_config + 1; /* +1 compared to GB_TILE_MODE */
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| radv_radeon_winsys.h | 141 unsigned pipe_config; member in struct:radeon_bo_metadata::__anon3266::__anon3267
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| radv_image.c | 752 metadata->u.legacy.pipe_config = surface->u.legacy.pipe_config;
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| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_surface.h | 119 unsigned pipe_config : 5; /* max 17 */ member in struct:legacy_surf_layout
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| ac_surface.c | 847 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
1118 AddrTileInfoIn.pipeConfig = surf->u.legacy.pipe_config + 1; /* +1 compared to GB_TILE_MODE */
2530 surf->u.legacy.pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
2583 *tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, surf->u.legacy.pipe_config);
2977 surf->u.legacy.tile_split, surf->u.legacy.pipe_config,
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_radeon_winsys.h | 133 unsigned pipe_config; member in struct:radeon_bo_metadata::__anon582::__anon583
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| radv_image.c | 433 surface->u.legacy.pipe_config = md->u.legacy.pipe_config;
1286 metadata->u.legacy.pipe_config = surface->u.legacy.pipe_config;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeon/ |
| radeon_winsys.h | 208 unsigned pipe_config; member in struct:radeon_bo_metadata::__anon4022::__anon4023
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeon/ |
| radeon_winsys.h | 227 unsigned pipe_config; member in struct:radeon_bo_metadata::__anon1579::__anon1580
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_bo.c | 671 tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->u.legacy.pipe_config);
716 md->u.legacy.pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| r600_texture.c | 283 metadata->u.legacy.pipe_config = surface->u.legacy.pipe_config;
299 surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
842 rtex->surface.u.legacy.tile_split, rtex->surface.u.legacy.pipe_config,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| r600_texture.c | 284 metadata->u.legacy.pipe_config = surface->u.legacy.pipe_config;
300 surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
847 rtex->surface.u.legacy.tile_split, rtex->surface.u.legacy.pipe_config,
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_bo.c | 933 tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->u.legacy.pipe_config);
981 md->u.legacy.pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
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| /xsrc/external/mit/MesaLib.old/dist/src/freedreno/vulkan/ |
| tu_cmd_buffer.c | 224 assert(max_pipe_count <= ARRAY_SIZE(tiling->pipe_config));
238 tiling->pipe_config[n] = A6XX_VSC_PIPE_CONFIG_REG_X(pipe_x) |
246 memset(tiling->pipe_config + used_pipe_count, 0,
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| tu_private.h | 806 uint32_t pipe_config[MAX_VSC_PIPES]; member in struct:tu_tiling_config
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_bo.c | 1244 md->u.legacy.pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);
1280 tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->u.legacy.pipe_config);
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| /xsrc/external/mit/MesaLib/dist/src/amd/addrlib/src/r800/ |
| ciaddrlib.cpp | 1596 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1);
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/addrlib/src/r800/ |
| ciaddrlib.cpp | 1591 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1);
|
