Searched refs:planes (Results 1 - 25 of 147) sorted by relevance

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/xsrc/external/mit/libX11/dist/src/
H A DFreeCols.c38 unsigned long planes) /* CARD32 */
46 req->planeMask = planes;
33 XFreeColors(register Display * dpy,Colormap cmap,unsigned long * pixels,int npixels,unsigned long planes) argument
H A DGetImage.c71 int planes; local in function:XGetImage
109 planes = image->depth;
114 planes = 1;
120 if (planes < 1 || image->height < 1 || image->bytes_per_line < 1 ||
122 INT_MAX / planes <= image->height * image->bytes_per_line ||
123 nbytes < planes * image->height * image->bytes_per_line) {
H A DAllCells.c50 req->planes = nplanes;
/xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/
H A Dpanvk_vX_meta_blit.c39 .format = blitinfo->dst.planes[0].format,
41 .image = blitinfo->dst.planes[0].image,
42 .nr_samples = blitinfo->dst.planes[0].image->layout.nr_samples,
50 .width = u_minify(blitinfo->dst.planes[0].image->layout.width, blitinfo->dst.level),
51 .height = u_minify(blitinfo->dst.planes[0].image->layout.height, blitinfo->dst.level),
58 .nr_samples = blitinfo->dst.planes[0].image->layout.nr_samples,
67 util_format_description(blitinfo->dst.planes[0].image->layout.format);
73 views[0].format = blitinfo->dst.planes[0].image->layout.format;
88 if (blitinfo->dst.planes[1].format != PIPE_FORMAT_NONE) {
90 views[1].format = blitinfo->dst.planes[
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/xsrc/external/mit/libdrm/dist/tests/util/
H A Dpattern.h39 void *planes[3], unsigned int width,
H A Dpattern.c1191 static void fill_smpte(const struct util_format_info *info, void *planes[3], argument
1199 return fill_smpte_c1(planes[0], width, height, stride);
1201 return fill_smpte_c2(planes[0], width, height, stride);
1203 return fill_smpte_c4(planes[0], width, height, stride);
1205 return fill_smpte_c8(planes[0], width, height, stride);
1210 return fill_smpte_yuv_packed(&info->yuv, planes[0], width,
1219 u = info->yuv.order & YUV_YCbCr ? planes[1] : planes[1] + 1;
1220 v = info->yuv.order & YUV_YCrCb ? planes[1] : planes[
1621 fill_tiles(const struct util_format_info * info,void * planes[3],unsigned int width,unsigned int height,unsigned int stride) argument
1720 fill_plain(const struct util_format_info * info,void * planes[3],unsigned int height,unsigned int stride) argument
1819 fill_gradient(const struct util_format_info * info,void * planes[3],unsigned int width,unsigned int height,unsigned int stride) argument
1864 util_fill_pattern(uint32_t format,enum util_fill_pattern pattern,void * planes[3],unsigned int width,unsigned int height,unsigned int stride) argument
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/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_image.c132 return &image->planes[plane].surface;
141 surf->offset = align_u32(image->planes[plane].size,
147 if (image->planes[plane].size == 0)
148 image->planes[plane].offset = image->size;
152 image->planes[plane].size = (surf->offset + surf->isl.size_B) - image->planes[plane].offset;
155 image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
250 assert(image->planes[plane].aux_surface.isl.size_B > 0 &&
258 assert((image->planes[plan
1458 uint32_t planes = 0; local in function:anv_image_aspect_get_planes
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H A DgenX_cmd_buffer.c253 if (iview->planes[0].isl.base_array_layer >=
255 iview->planes[0].isl.base_level)) {
290 if (isl_format_supports_ccs_e(&device->info, iview->planes[0].isl.format)) {
309 assert(iview->image->planes[0].aux_surface.isl.usage &
316 isl_color_value_is_zero_one(clear_color, iview->planes[0].isl.format);
318 isl_color_value_is_zero(clear_color, iview->planes[0].isl.format);
363 (iview->planes[0].isl.base_level > 0 ||
364 iview->planes[0].isl.base_array_layer > 0)) {
424 iview->planes[0].isl.format,
511 if (image->planes[plan
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H A Danv_formats.c51 .planes = { \
66 .planes = { \
78 .planes = { \
90 .planes = { \
106 .planes = { \
132 .planes = { \
433 if (format->planes[0].isl_format == ISL_FORMAT_UNSUPPORTED)
455 struct anv_format_plane plane_format = format->planes[plane];
629 if (isl_format_is_yuv(anv_format->planes[0].isl_format)) {
641 /* We can support cosited chroma locations when handle planes wit
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/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_meta_dcc_retile.c198 unsigned swizzle_mode = image->planes[0].surface.u.gfx9.swizzle_mode;
203 radv_device_init_meta_dcc_retile_state(cmd_buffer->device, &image->planes[0].surface);
225 .offset = image->planes[0].surface.meta_offset,
226 .range = image->planes[0].surface.meta_size,
233 .offset = image->planes[0].surface.display_dcc_offset,
234 .range = image->planes[0].surface.u.gfx9.color.display_dcc_size,
265 unsigned dcc_width = DIV_ROUND_UP(width, image->planes[0].surface.u.gfx9.color.dcc_block_width);
267 DIV_ROUND_UP(height, image->planes[0].surface.u.gfx9.color.dcc_block_height);
270 image->planes[0].surface.u.gfx9.color.dcc_pitch_max + 1,
271 image->planes[
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H A Dradv_image.c103 * with no Z planes compression.
325 &image->planes[0].surface);
521 radv_patch_surface_from_metadata(device, &image->planes[plane].surface,
526 image->planes[plane].surface.flags |= RADEON_SURF_SCANOUT;
528 image->planes[plane].surface.flags |= RADEON_SURF_DISABLE_DCC;
729 struct radv_image_plane *plane = &image->planes[plane_id];
964 image->planes[0].surface.u.gfx9.color.dcc.max_compressed_block_size) |
981 va = gpu_address + image->offset + image->planes[0].surface.fmask_offset;
997 fmask_state[0] = (va >> 8) | image->planes[0].surface.fmask_tile_swizzle;
1005 S_00A00C_SW_MODE(image->planes[
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/xsrc/external/mit/libdrm/dist/tests/modetest/
H A Dbuffers.c123 void *planes[3] = { 0, }; local in function:bo_create
291 planes[0] = virtual;
310 planes[0] = virtual;
311 planes[1] = virtual + offsets[1];
330 planes[0] = virtual;
331 planes[1] = virtual + offsets[1];
332 planes[2] = virtual + offsets[2];
385 planes[0] = virtual;
389 util_fill_pattern(format, pattern, planes, width, height, pitches[0]);
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_image.c331 * @see anv_image::planes[]::shadow_surface
460 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
472 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
492 &image->planes[plane].fast_clear_memory_range);
519 assert(!anv_surface_is_valid(&image->planes[plane].aux_surface));
558 &image->planes[plane].primary_surface.isl,
559 &image->planes[plane].aux_surface.isl);
564 &image->planes[plane].primary_surface.isl,
565 &image->planes[plane].aux_surface.isl)) {
566 image->planes[plan
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H A Danv_formats.c52 .planes = { \
67 .planes = { \
79 .planes = { \
91 .planes = { \
107 .planes = { \
133 .planes = { \
441 if (format->planes[0].isl_format == ISL_FORMAT_UNSUPPORTED)
452 isl_format_get_layout(anv_format->planes[i].isl_format);
485 struct anv_format_plane plane_format = format->planes[plane];
684 if (isl_format_is_yuv(anv_format->planes[
877 uint32_t planes = anv_format->n_planes; local in function:get_drm_format_modifier_properties_list
910 uint32_t planes = anv_format->n_planes; local in function:get_drm_format_modifier_properties_list_2
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H A DgenX_cmd_buffer.c364 if (iview->planes[0].isl.base_array_layer >=
366 iview->planes[0].isl.base_level))
381 if (!isl_color_value_is_zero(clear_color, iview->planes[0].isl.format))
400 !isl_color_value_is_zero_one(clear_color, iview->planes[0].isl.format))
409 &iview->image->planes[0].primary_surface.isl,
410 &iview->planes[0].isl)) {
424 if (iview->planes[0].isl.base_level > 0 ||
425 iview->planes[0].isl.base_array_layer > 0) {
468 &iview->image->planes[0].primary_surface.isl,
470 iview->planes[
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/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_image.c93 * 16-bit depth surfaces if no Z planes are compressed.
353 struct radv_image_plane *plane = &image->planes[plane_id];
668 fmask_state[3] |= S_008F1C_SW_MODE(image->planes[0].surface.u.gfx9.fmask.swizzle_mode);
670 S_008F20_PITCH_GFX9(image->planes[0].surface.u.gfx9.fmask.epitch);
671 fmask_state[5] |= S_008F24_META_PIPE_ALIGNED(image->planes[0].surface.u.gfx9.cmask.pipe_aligned) |
672 S_008F24_META_RB_ALIGNED(image->planes[0].surface.u.gfx9.cmask.rb_aligned);
716 si_set_mutable_tex_desc_fields(device, image, &image->planes[0].surface.u.legacy.level[0], 0, 0, 0,
717 image->planes[0].surface.blk_w, false, false, desc);
730 md->metadata[10+i] = image->planes[0].surface.u.legacy.level[i].offset >> 8;
741 struct radeon_surf *surface = &image->planes[
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/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dintel_image.h64 } planes[3]; member in struct:intel_image_format
/xsrc/external/mit/MesaLib/dist/src/gallium/frontends/dri/
H A Ddri_helpers.h41 } planes[3]; member in struct:dri2_format_mapping
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_image.h64 } planes[3]; member in struct:brw_image_format
/xsrc/external/mit/libvdpau/dist/trace/
H A Dvdpau_trace.cpp862 _VdpcapPlane const * planes
865 if (!planes) {
872 uint32_t lines = planes[0].lines;
875 if (planes[0].item_size == 4) {
883 uint8_t const * ptr = (uint8_t const *)planes[0].data;
885 dumper(planes[0].item_count, ptr);
890 ptr += planes[0].pitch;
900 ++planes;
907 _VdpcapPlane * planes,
919 planes[
860 _vdp_cap_dump_plane_list(uint32_t plane_count,_VdpcapPlane const * planes) argument
905 _vdp_cap_init_planes_for_ycbcr_format(uint32_t * plane_count,_VdpcapPlane * planes,VdpYCbCrFormat format,uint32_t region_width,uint32_t region_height) argument
968 _vdp_cap_init_planes_for_rgba_format(uint32_t * plane_count,_VdpcapPlane * planes,VdpRGBAFormat format,uint32_t region_width,uint32_t region_height) argument
1003 _vdp_cap_init_planes_for_indexed_format(uint32_t * plane_count,_VdpcapPlane * planes,VdpIndexedFormat format,uint32_t region_width,uint32_t region_height) argument
1037 _vdp_cap_init_planes_adapt_format_bits_ycbcr(uint32_t * plane_count,_VdpcapPlane * planes,uint32_t surface_format,uint32_t bits_format,uint32_t region_width,uint32_t region_height) argument
1055 _vdp_cap_init_planes_adapt_format_surface_rgba(uint32_t * plane_count,_VdpcapPlane * planes,uint32_t surface_format,uint32_t bits_format,uint32_t region_width,uint32_t region_height) argument
1073 _vdp_cap_init_planes_adapt_format_bits_indexed(uint32_t * plane_count,_VdpcapPlane * planes,uint32_t surface_format,uint32_t bits_format,uint32_t region_width,uint32_t region_height) argument
1184 _vdp_cap_init_planes(uint32_t surface,void const * const * source_data,uint32_t const * source_pitches,VdpRect const * destination_rect,uint32_t * plane_count,_VdpcapPlane * planes,_Vdpcap_Init_Planes_Adapt_Surface * adapt_surface,_Vdpcap_Init_Planes_Adapt_Format * adapt_format,uint32_t adapt_format_bits_format) argument
1984 _VdpcapPlane planes[3]; local in function:_vdp_cap_video_surface_get_bits_y_cb_cr
2048 _VdpcapPlane planes[3]; local in function:_vdp_cap_video_surface_put_bits_y_cb_cr
2446 _VdpcapPlane planes[1]; local in function:_vdp_cap_output_surface_get_bits_native
2511 _VdpcapPlane planes[1]; local in function:_vdp_cap_output_surface_put_bits_native
2579 _VdpcapPlane planes[1]; local in function:_vdp_cap_output_surface_put_bits_indexed
2660 _VdpcapPlane planes[1]; local in function:_vdp_cap_output_surface_put_bits_y_cb_cr
2937 _VdpcapPlane planes[1]; local in function:_vdp_cap_bitmap_surface_put_bits_native
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/xsrc/external/mit/libdrm/dist/tests/etnaviv/
H A Dwrite_bmp.c50 unsigned short planes; member in struct:dib_header
79 .planes = 1,
/xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/sw/kms-dri/
H A Dkms_dri_sw_winsys.c87 struct list_head planes; member in struct:kms_sw_displaytarget
141 LIST_FOR_EACH_ENTRY(plane, &kms_sw_dt->planes, link) {
155 list_add(&plane->link, &kms_sw_dt->planes);
178 list_inithead(&kms_sw_dt->planes);
242 LIST_FOR_EACH_ENTRY_SAFE(plane, tmp, &kms_sw_dt->planes, link) {
332 list_inithead(&kms_sw_dt->planes);
415 LIST_FOR_EACH_ENTRY(plane, &kms_sw_dt->planes, link) {
/xsrc/external/mit/MesaLib/dist/src/gallium/winsys/sw/kms-dri/
H A Dkms_dri_sw_winsys.c87 struct list_head planes; member in struct:kms_sw_displaytarget
141 LIST_FOR_EACH_ENTRY(plane, &kms_sw_dt->planes, link) {
155 list_add(&plane->link, &kms_sw_dt->planes);
178 list_inithead(&kms_sw_dt->planes);
242 LIST_FOR_EACH_ENTRY_SAFE(plane, tmp, &kms_sw_dt->planes, link) {
332 list_inithead(&kms_sw_dt->planes);
415 LIST_FOR_EACH_ENTRY(plane, &kms_sw_dt->planes, link) {
/xsrc/external/mit/MesaLib.old/dist/docs/specs/
H A DWL_bind_wayland_display.spec104 A wl_buffer can have several planes, typically in case of planar
107 various planes. The eglQueryWaylandBufferWL function should be
121 in the shader. The naming conventions separates planes by _ and
140 Three planes, samples Y from the first plane to r in
145 Two planes, samples Y from the first plane to r in
149 Two planes, samples Y from the first plane to r in
157 planes by calling eglCreateImageKHR with wl_buffer as
188 for different planes of planar buffer. (Kristian Høgsberg)
/xsrc/external/mit/MesaLib/dist/docs/_extra/specs/
H A DWL_bind_wayland_display.spec104 A wl_buffer can have several planes, typically in case of planar
107 various planes. The eglQueryWaylandBufferWL function should be
121 in the shader. The naming conventions separates planes by _ and
140 Three planes, samples Y from the first plane to r in
145 Two planes, samples Y from the first plane to r in
149 Two planes, samples Y from the first plane to r in
157 planes by calling eglCreateImageKHR with wl_buffer as
188 for different planes of planar buffer. (Kristian Høgsberg)

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