Searched refs:radeon_compute_set_context_reg (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Devergreen_compute.c634 radeon_compute_set_context_reg(cs, R_0288E8_SQ_LDS_ALLOC,
687 radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
690 radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
694 radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,
796 radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,
H A Dr600_pipe.h998 static inline void radeon_compute_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) function in typeref:typename:void
1007 radeon_compute_set_context_reg(cs, reg, value);
H A Devergreen_state.c1774 radeon_compute_set_context_reg(cs, R_028B9C_CB_IMMED0_BASE + (idx * 4), resource->immed_buffer->gpu_address >> 8);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Devergreen_compute.c656 radeon_compute_set_context_reg(cs, R_0288E8_SQ_LDS_ALLOC,
709 radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
712 radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
716 radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,
825 radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,
H A Dr600_pipe.h1004 static inline void radeon_compute_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) function in typeref:typename:void
1013 radeon_compute_set_context_reg(cs, reg, value);
H A Devergreen_state.c1780 radeon_compute_set_context_reg(cs, R_028B9C_CB_IMMED0_BASE + (idx * 4), resource->immed_buffer->gpu_address >> 8);

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