Searched refs:ss3 (Results 1 - 25 of 45) sorted by relevance

12

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dkgem_debug_gen7.c497 s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode);
498 t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode);
499 r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode);
509 s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode);
510 t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode);
511 r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode);
H A Dgen7_render.c1263 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1264 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1265 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1268 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1269 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1270 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1273 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1274 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1275 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1278 sampler_state->ss3
[all...]
H A Dgen8_render.c1362 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1363 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1364 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1367 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_WRAP;
1368 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_WRAP;
1369 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_WRAP;
1372 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP;
1373 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP;
1374 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP;
1377 sampler_state->ss3
[all...]
H A Dgen9_render.c1441 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1442 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1443 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1446 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_WRAP;
1447 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_WRAP;
1448 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_WRAP;
1451 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP;
1452 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP;
1453 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP;
1456 sampler_state->ss3
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dkgem_debug_gen7.c497 s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode);
498 t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode);
499 r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode);
509 s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode);
510 t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode);
511 r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode);
H A Dgen7_render.c1226 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1227 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1228 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER;
1231 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1232 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1233 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_WRAP;
1236 sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1237 sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1238 sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP;
1241 sampler_state->ss3
[all...]
H A Dgen8_render.c1295 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1296 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1297 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
1300 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_WRAP;
1301 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_WRAP;
1302 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_WRAP;
1305 sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP;
1306 sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP;
1307 sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP;
1310 sampler_state->ss3
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_render.c911 sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
950 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
951 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
952 sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
955 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
956 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
957 sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
960 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
961 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
962 sampler_state->ss3
[all...]
H A Dbrw_structs.h933 } ss3; member in struct:brw_sampler_state
1014 } ss3; member in struct:brw_surface_state
1635 } ss3; member in struct:gen7_surface_state
1720 } ss3; member in struct:gen7_sampler_state
H A Di965_video.c423 dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
424 dest_surf_state.ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap);
425 dest_surf_state.ss3.tile_walk = 0; /* TileX */
463 src_surf_state.ss3.pitch = src_pitch - 1;
511 dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
556 src_surf_state.ss3.pitch = src_pitch - 1;
611 sampler_state.ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
612 sampler_state.ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
613 sampler_state.ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_render.c911 sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
950 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
951 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
952 sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
955 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
956 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
957 sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
960 sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
961 sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
962 sampler_state->ss3
[all...]
H A Dbrw_structs.h933 } ss3; member in struct:brw_sampler_state
1014 } ss3; member in struct:brw_surface_state
1635 } ss3; member in struct:gen7_surface_state
1720 } ss3; member in struct:gen7_sampler_state
H A Di965_video.c424 dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
425 dest_surf_state.ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap);
426 dest_surf_state.ss3.tile_walk = 0; /* TileX */
464 src_surf_state.ss3.pitch = src_pitch - 1;
512 dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
557 src_surf_state.ss3.pitch = src_pitch - 1;
612 sampler_state.ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
613 sampler_state.ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
614 sampler_state.ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_structs.h933 } ss3; member in struct:brw_sampler_state
1014 } ss3; member in struct:brw_surface_state
1635 } ss3; member in struct:gen7_surface_state
1720 } ss3; member in struct:gen7_sampler_state
H A Di965_xvmc.c329 ss->ss3.pitch = w - 1;
434 ss.ss3.depth = e.whd.d;
435 ss.ss3.pitch = block_size - 1;
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_structs.h933 } ss3; member in struct:brw_sampler_state
1014 } ss3; member in struct:brw_surface_state
1635 } ss3; member in struct:gen7_surface_state
1720 } ss3; member in struct:gen7_sampler_state
H A Di965_xvmc.c329 ss->ss3.pitch = w - 1;
434 ss.ss3.depth = e.whd.d;
435 ss.ss3.pitch = block_size - 1;
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c115 i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) argument
296 ss3 |
H A Di915_texstate.c140 i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) argument
348 state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c115 i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) argument
296 ss3 |
H A Di915_texstate.c140 i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) argument
348 state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_video.c405 dest_surf_state->ss3.pitch = intel_get_pixmap_pitch(pixmap) - 1;
406 dest_surf_state->ss3.tiled_surface = i830_pixmap_tiled(pixmap);
407 dest_surf_state->ss3.tile_walk = 0; /* TileX */
447 src_surf_state->ss3.pitch = src_pitch - 1;
H A Dbrw_structs.h928 } ss3; member in struct:brw_sampler_state
1009 } ss3; member in struct:brw_surface_state
H A Di965_render.c760 sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
1083 local_ss.ss3.pitch = intel_get_pixmap_pitch(pPixmap) - 1;
1084 local_ss.ss3.tile_walk = 0; /* Tiled X */
1085 local_ss.ss3.tiled_surface = i830_pixmap_tiled(pPixmap) ? 1 : 0;
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di965_xvmc.c322 ss->ss3.pitch = w - 1;
407 ss.ss3.depth = e.whd.d;
408 ss.ss3.pitch = block_size - 1;

Completed in 96 milliseconds

12