Searched refs:start_addr (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_debug.c263 si_add_split_disasm(const char *disasm, uint64_t start_addr, unsigned *num, argument
290 " [PC=0x%" PRIx64 ", off=%u, size=%u]", start_addr + inst->offset, inst->offset,
303 uint64_t start_addr, end_addr; local in function:radv_dump_annotated_shader
309 start_addr = radv_shader_variant_get_va(shader);
310 end_addr = start_addr + shader->code_size;
314 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
332 si_add_split_disasm(shader->disasm_string, start_addr, &num_inst, instructions);
344 while (num_waves && start_addr + inst->offset == waves->pc) {
890 uint64_t start_addr, end_addr; local in function:radv_dump_faulty_shader
897 start_addr
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_debug.c341 uint64_t start_addr,
364 start_addr + inst->offset, inst->offset, inst->size);
377 uint64_t start_addr, end_addr; local in function:radv_dump_annotated_shader
383 start_addr = radv_buffer_get_va(shader->bo) + shader->bo_offset;
384 end_addr = start_addr + shader->code_size;
388 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
407 start_addr, &num_inst, instructions);
419 while (num_waves && start_addr + inst->offset == waves->pc) {
340 si_add_split_disasm(const char * disasm,uint64_t start_addr,unsigned * num,struct radv_shader_inst * instructions) argument
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_debug.c922 uint64_t start_addr = shader->bo->gpu_address; local in function:si_print_annotated_shader
923 uint64_t end_addr = start_addr + shader->bo->b.b.width0;
928 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
942 uint64_t inst_addr = start_addr;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_debug.c907 uint64_t start_addr = shader->bo->gpu_address; local in function:si_print_annotated_shader
908 uint64_t end_addr = start_addr + shader->bo->b.b.width0;
913 if (start_addr <= waves[i].pc && waves[i].pc <= end_addr)
927 uint64_t inst_addr = start_addr;
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_structs.h1041 unsigned int start_addr; member in struct:brw_vertex_buffer_state
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_structs.h1041 unsigned int start_addr; member in struct:brw_vertex_buffer_state
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_structs.h1041 unsigned int start_addr; member in struct:brw_vertex_buffer_state
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_structs.h1041 unsigned int start_addr; member in struct:brw_vertex_buffer_state
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_structs.h1036 unsigned int start_addr; member in struct:brw_vertex_buffer_state
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_batch_chain.c303 return anv_address_add(batch->start_addr, batch_location - batch->start);
425 batch->start_addr = (struct anv_address) { .bo = bbo->bo, };
H A Danv_private.h1538 struct anv_address start_addr; member in struct:anv_batch
1570 batch->start_addr = addr;
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen4_render.h2104 unsigned int start_addr; member in struct:gen4_vertex_buffer_state
H A Dgen5_render.h2184 unsigned int start_addr; member in struct:gen5_vertex_buffer_state
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen4_render.h2104 unsigned int start_addr; member in struct:gen4_vertex_buffer_state
H A Dgen5_render.h2184 unsigned int start_addr; member in struct:gen5_vertex_buffer_state

Completed in 71 milliseconds