| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_meta_dcc_retile.c | 172 &vk_pipeline_info, NULL, &device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode]); 198 unsigned swizzle_mode = image->planes[0].surface.u.gfx9.swizzle_mode; local 201 if (!cmd_buffer->device->meta_state.dcc_retile.pipeline[swizzle_mode]) { 215 device->meta_state.dcc_retile.pipeline[swizzle_mode]);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/ |
| crocus_bufmgr.h | 106 uint32_t swizzle_mode; member in struct:crocus_bo 263 * \param swizzle_mode returned swizzling mode 266 uint32_t *swizzle_mode);
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| crocus_bufmgr.c | 368 bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 584 bo->swizzle_mode = get_tiling.swizzle_mode; 1196 bo->swizzle_mode = set_tiling.swizzle_mode; 1203 uint32_t *swizzle_mode) 1206 *swizzle_mode = bo->swizzle_mode;
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| crocus_screen.c | 726 uint32_t swizzle_mode = 0; local 733 crocus_bo_get_tiling(buffer, &tiling, &swizzle_mode); 736 return swizzle_mode != I915_BIT_6_SWIZZLE_NONE;
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| brw_bufmgr.h | 168 uint32_t swizzle_mode; member in struct:brw_bo 320 * \param swizzle_mode returned swizzling mode 323 uint32_t *swizzle_mode);
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| brw_bufmgr.c | 655 bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 835 bo->swizzle_mode = get_tiling.swizzle_mode; 1456 bo->swizzle_mode = set_tiling.swizzle_mode; 1463 uint32_t *swizzle_mode) 1466 *swizzle_mode = bo->swizzle_mode; 1533 bo->swizzle_mode = get_tiling.swizzle_mode; [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/ |
| iris_bufmgr.h | 154 uint32_t swizzle_mode; member in struct:iris_bo 291 * \param swizzle_mode returned swizzling mode 294 uint32_t *swizzle_mode);
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| iris_bufmgr.c | 471 bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 676 bo->swizzle_mode = get_tiling.swizzle_mode; 1206 bo->swizzle_mode = set_tiling.swizzle_mode; 1213 uint32_t *swizzle_mode) 1216 *swizzle_mode = bo->swizzle_mode; 1277 bo->swizzle_mode = get_tiling.swizzle_mode; [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| brw_bufmgr.h | 167 uint32_t swizzle_mode; member in struct:brw_bo 312 * \param swizzle_mode returned swizzling mode 315 uint32_t *swizzle_mode);
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| brw_bufmgr.c | 619 bo->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 799 bo->swizzle_mode = get_tiling.swizzle_mode; 1358 bo->swizzle_mode = set_tiling.swizzle_mode; 1365 uint32_t *swizzle_mode) 1368 *swizzle_mode = bo->swizzle_mode; 1435 bo->swizzle_mode = get_tiling.swizzle_mode; [all...] |
| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_surface_meta_address_test.c | 59 /* equation varies with resource_type, swizzle_mode, 198 unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, 217 xin.swizzleMode = in.swizzleMode = din.swizzleMode = swizzle_mode; 321 unsigned swizzle_mode = info->chip_class == GFX9 ? ADDR_SW_64KB_S_X : ADDR_SW_64KB_R_X; local 363 bpp, swizzle_mode, pipe_aligned, rb_aligned, mrt_index, 405 unsigned bpp, unsigned swizzle_mode, 424 hin.swizzleMode = in.swizzleMode = xin.swizzleMode = swizzle_mode; 544 unsigned bpp, unsigned swizzle_mode, 557 cin.swizzleMode = xin.swizzleMode = in.swizzleMode = swizzle_mode; 640 unsigned swizzle_mode = info->chip_class == GFX9 ? ADDR_SW_64KB_S_X : ADDR_SW_64KB_Z_X local [all...] |
| ac_surface_modifier_test.c | 78 din.swizzleMode = surf->u.gfx9.swizzle_mode; 95 dcc_input.swizzleMode = surf->u.gfx9.swizzle_mode; 133 input.swizzleMode = surf->u.gfx9.swizzle_mode;
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| ac_surface.c | 1356 AddrSwizzleMode *swizzle_mode) 1429 *swizzle_mode = sout.swizzleMode; 1672 surf->u.gfx9.swizzle_mode = in->swizzleMode; 1679 surf->u.gfx9.color.fmask_swizzle_mode = surf->u.gfx9.swizzle_mode & ~0x3; 1690 surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR) { 2199 AddrSurfInfoIn.swizzleMode = surf->u.gfx9.swizzle_mode; 2264 surf->is_linear = surf->u.gfx9.swizzle_mode == ADDR_SW_LINEAR; 2270 r = Addr2IsValidDisplaySwizzleMode(addrlib->handle, surf->u.gfx9.swizzle_mode, 2293 assert(is_dcc_supported_by_CB(info, surf->u.gfx9.swizzle_mode)); 2325 switch (surf->u.gfx9.swizzle_mode) { [all...] |
| /xsrc/external/mit/libdrm/dist/intel/ |
| intel_bufmgr.c | 251 uint32_t * swizzle_mode) 254 return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode); 257 *swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
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| intel_bufmgr_priv.h | 238 * \param swizzle_mode returned swizzling mode 241 uint32_t * swizzle_mode);
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| intel_bufmgr_gem.c | 191 uint32_t swizzle_mode; member in struct:_drm_intel_bo_gem 293 uint32_t * swizzle_mode); 783 bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 944 bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 1036 uint32_t *swizzle_mode) 1050 *swizzle_mode = get_tiling.swizzle_mode; 1132 &bo_gem->tiling_mode, &bo_gem->swizzle_mode); 2518 bo_gem->swizzle_mode = set_tiling.swizzle_mode; [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| radv_android.c | 166 is_scanout = md.u.gfx9.swizzle_mode == 0 || md.u.gfx9.swizzle_mode % 4 == 2;
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| radv_radeon_winsys.h | 153 unsigned swizzle_mode:5; member in struct:radeon_bo_metadata::__anon3266::__anon3268
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| si_clear.c | 287 assert(tex->surface.u.gfx9.surf.swizzle_mode >= 4); 289 /* If you do swizzle_mode % 4, you'll get: 297 assert(tex->surface.u.gfx9.surf.swizzle_mode % 4 != 0); 301 tex->surface.u.gfx9.surf.swizzle_mode &= ~0x3; 302 tex->surface.u.gfx9.surf.swizzle_mode += 2; /* D */ 305 tex->surface.u.gfx9.surf.swizzle_mode &= ~0x3; 306 tex->surface.u.gfx9.surf.swizzle_mode += 1; /* S */ 309 tex->surface.u.gfx9.surf.swizzle_mode &= ~0x3; 310 tex->surface.u.gfx9.surf.swizzle_mode += 3; /* R */
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| si_test_dma.c | 143 switch (surf->u.gfx9.surf.swizzle_mode) { 156 surf->u.gfx9.surf.swizzle_mode);
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| ac_surface.c | 1042 bool is_fmask, AddrSwizzleMode *swizzle_mode) 1077 *swizzle_mode = sout.swizzleMode; 1099 surf->u.gfx9.stencil.swizzle_mode = in->swizzleMode; 1108 surf->u.gfx9.surf.swizzle_mode = in->swizzleMode; 1115 surf->u.gfx9.fmask.swizzle_mode = surf->u.gfx9.surf.swizzle_mode & ~0x3; 1382 surf->u.gfx9.fmask.swizzle_mode = fin.swizzleMode; 1439 cin.swizzleMode = surf->u.gfx9.fmask.swizzle_mode; 1580 AddrSurfInfoIn.swizzleMode = surf->u.gfx9.surf.swizzle_mode; 1636 surf->is_linear = surf->u.gfx9.surf.swizzle_mode == ADDR_SW_LINEAR [all...] |
| ac_surface.h | 128 uint16_t swizzle_mode; /* tile mode */ member in struct:gfx9_surf_flags
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| si_clear.c | 379 assert(tex->surface.u.gfx9.swizzle_mode >= 4); 381 /* If you do swizzle_mode % 4, you'll get: 389 assert(tex->surface.u.gfx9.swizzle_mode % 4 != 0); 393 tex->surface.u.gfx9.swizzle_mode &= ~0x3; 394 tex->surface.u.gfx9.swizzle_mode += 2; /* D */ 397 tex->surface.u.gfx9.swizzle_mode &= ~0x3; 398 tex->surface.u.gfx9.swizzle_mode += 1; /* S */ 401 tex->surface.u.gfx9.swizzle_mode &= ~0x3; 402 tex->surface.u.gfx9.swizzle_mode += 3; /* R */
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| si_test_blit.c | 124 switch (surf->u.gfx9.swizzle_mode) { 138 printf("Unhandled swizzle mode = %u\n", surf->u.gfx9.swizzle_mode);
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| si_compute_blit.c | 623 void **shader = &sctx->cs_dcc_retile[tex->surface.u.gfx9.swizzle_mode]; 667 unsigned swizzle_mode = tex->surface.u.gfx9.swizzle_mode; local 672 void **shader = &sctx->cs_clear_dcc_msaa[swizzle_mode][bpe_log2][fragments8][log2_samples - 2][is_array];
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