| /xsrc/external/mit/MesaLib.old/dist/src/mesa/vbo/ |
| vbo_save.c | 47 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm)
48 save->VAO[vpm] = NULL;
61 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm)
62 _mesa_reference_vao(ctx, &save->VAO[vpm], NULL);
|
| vbo_save_api.c | 592 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm) {
594 update_vao(ctx, vpm, &save->VAO[vpm],
598 node->VAO[vpm] = NULL;
599 _mesa_reference_vao(ctx, &node->VAO[vpm], save->VAO[vpm]);
684 for (gl_vertex_processing_mode vpm = 0; vpm < VP_MODE_MAX; ++vpm
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/mesa/vbo/ |
| vbo_save.c | 45 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm)
46 save->VAO[vpm] = NULL;
59 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm)
60 _mesa_reference_vao(ctx, &save->VAO[vpm], NULL);
|
| vbo_save_api.c | 913 for (gl_vertex_processing_mode vpm = VP_MODE_FF; vpm < VP_MODE_MAX; ++vpm) {
915 update_vao(ctx, vpm, &save->VAO[vpm],
919 node->VAO[vpm] = NULL;
920 _mesa_reference_vao(ctx, &node->VAO[vpm], save->VAO[vpm]);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/ |
| vc4_nir_lower_io.c | 119 nir_ssa_def *vpm = vpm_reads[0]; local
121 temp = nir_ixor(b, vpm, nir_imm_int(b, 0x80808080));
136 return vc4_nir_unpack_8f(b, vpm, swiz);
138 return nir_i2f32(b, vc4_nir_unpack_8i(b, vpm, swiz));
144 nir_ssa_def *vpm = vpm_reads[swiz / 2]; local
150 temp = nir_i2f32(b, vc4_nir_unpack_16i(b, vpm, swiz & 1));
158 temp = nir_i2f32(b, vc4_nir_unpack_16u(b, vpm, swiz & 1));
186 /* Generate dword loads for the VPM values (Since these intrinsics may
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/ |
| vc4_nir_lower_io.c | 118 nir_ssa_def *vpm = vpm_reads[0]; local
120 temp = nir_ixor(b, vpm, nir_imm_int(b, 0x80808080));
135 return vc4_nir_unpack_8f(b, vpm, swiz);
137 return nir_i2f32(b, vc4_nir_unpack_8i(b, vpm, swiz));
143 nir_ssa_def *vpm = vpm_reads[swiz / 2]; local
149 temp = nir_i2f32(b, vc4_nir_unpack_16i(b, vpm, swiz & 1));
157 temp = nir_i2f32(b, vc4_nir_unpack_16u(b, vpm, swiz & 1));
185 /* Generate dword loads for the VPM values (Since these intrinsics may
|
| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| r600_shader.h | 81 // vpm
164 #define CF_DWORD1(pc, cf_const, cond, count, call_count, eop, vpm, cf_inst, wqm, b) \
166 ((call_count) << 13) | ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | ((wqm) << 30) | ((b) << 31)))
179 #define CF_ALLOC_IMP_EXP_DWORD1_BUF(array_size, comp_mask, el, bc, eop, vpm, cf_inst, wqm, b) \
181 ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | ((wqm) << 30) | ((b) << 31)))
182 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, el, bc, eop, vpm, cf_inst, wqm, b) \
184 ((bc) << 17) | ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | \
|
| cayman_shader.h | 49 // vpm
106 #define CF_DWORD1(pc, cf_const, cond, count, vpm, cf_inst, b) \
108 ((vpm) << 20) | ((cf_inst) << 22) | ((b) << 31)))
118 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, bc, vpm, cf_inst, m, b) \
120 ((bc) << 16) | ((vpm) << 20) | ((cf_inst) << 22) | ((m) << 30) | ((b) << 31)))
|
| evergreen_shader.h | 49 // vpm
108 #define CF_DWORD1(pc, cf_const, cond, count, vpm, eop, cf_inst, wqm, b) \
110 ((vpm) << 20) | ((eop) << 21) | ((cf_inst) << 22) | ((wqm) << 30) | ((b) << 31)))
120 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, bc, vpm, eop, cf_inst, m, b) \
122 ((bc) << 16) | ((vpm) << 20) | ((eop) << 21) | ((cf_inst) << 22) | \
|
| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| r600_shader.h | 81 // vpm
164 #define CF_DWORD1(pc, cf_const, cond, count, call_count, eop, vpm, cf_inst, wqm, b) \
166 ((call_count) << 13) | ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | ((wqm) << 30) | ((b) << 31)))
179 #define CF_ALLOC_IMP_EXP_DWORD1_BUF(array_size, comp_mask, el, bc, eop, vpm, cf_inst, wqm, b) \
181 ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | ((wqm) << 30) | ((b) << 31)))
182 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, el, bc, eop, vpm, cf_inst, wqm, b) \
184 ((bc) << 17) | ((eop) << 21) | ((vpm) << 22) | ((cf_inst) << 23) | \
|
| cayman_shader.h | 49 // vpm
106 #define CF_DWORD1(pc, cf_const, cond, count, vpm, cf_inst, b) \
108 ((vpm) << 20) | ((cf_inst) << 22) | ((b) << 31)))
118 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, bc, vpm, cf_inst, m, b) \
120 ((bc) << 16) | ((vpm) << 20) | ((cf_inst) << 22) | ((m) << 30) | ((b) << 31)))
|
| evergreen_shader.h | 49 // vpm
108 #define CF_DWORD1(pc, cf_const, cond, count, vpm, eop, cf_inst, wqm, b) \
110 ((vpm) << 20) | ((eop) << 21) | ((cf_inst) << 22) | ((wqm) << 30) | ((b) << 31)))
120 #define CF_ALLOC_IMP_EXP_DWORD1_SWIZ(sel_x, sel_y, sel_z, sel_w, bc, vpm, eop, cf_inst, m, b) \
122 ((bc) << 16) | ((vpm) << 20) | ((eop) << 21) | ((cf_inst) << 22) | \
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| eg_asm.c | 76 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
112 S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(cf->vpm) |
141 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
|
| r600_asm.h | 206 unsigned vpm; member in struct:r600_bytecode_cf
|
| r600_asm.c | 2152 if (cf->vpm)
2153 fprintf(stderr, "VPM ");
2258 if (cf->vpm)
2259 fprintf(stderr, "VPM ");
|
| r600_shader.c | 1492 /* do a vtx fetch in VPM mode */
1508 ctx->bc->cf_last->vpm = 1;
8747 ctx->bc->cf_last->vpm = 1;
8929 cf->vpm = 1;
9073 cf->vpm = 1;
9131 cf->vpm = 1;
9302 cf->vpm = 1;
9346 cf->vpm = 1;
9474 ctx->bc->cf_last->vpm = 1;
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| eg_asm.c | 76 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
112 S_SQ_CF_ALLOC_EXPORT_WORD1_VALID_PIXEL_MODE(cf->vpm) |
141 S_SQ_CF_WORD1_VALID_PIXEL_MODE(cf->vpm) |
|
| r600_asm.h | 202 unsigned vpm; member in struct:r600_bytecode_cf
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/ |
| swr_state.h | 129 SWR_VIEWPORT_MATRICES vpm; member in struct:swr_derived_state
|
| swr_state.cpp | 1359 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1377 vpm->m00[i] = state->scale[0];
1378 vpm->m11[i] = state->scale[1];
1379 vpm->m22[i] = state->scale[2];
1380 vpm->m30[i] = state->translate[0];
1381 vpm->m31[i] = state->translate[1];
1382 vpm->m32[i] = state->translate[2];
1401 &ctx->derived.vp[0], &ctx->derived.vpm);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/ |
| swr_state.h | 107 SWR_VIEWPORT_MATRICES vpm; member in struct:swr_derived_state
|
| swr_state.cpp | 1210 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1219 vpm->m00[0] = state->scale[0];
1220 vpm->m11[0] = state->scale[1];
1221 vpm->m22[0] = state->scale[2];
1222 vpm->m30[0] = state->translate[0];
1223 vpm->m31[0] = state->translate[1];
1224 vpm->m32[0] = state->translate[2];
1239 ctx->api.pfnSwrSetViewports(ctx->swrContext, 1, vp, vpm);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| sfn_ir_to_assembly.cpp | 781 m_bc->cf_last->vpm = (m_bc->type == PIPE_SHADER_FRAGMENT) && fetch_instr.use_vpm();
884 m_bc->cf_last->vpm = PIPE_SHADER_FRAGMENT == m_bc->type;
1067 cf->vpm = m_bc->type == PIPE_SHADER_FRAGMENT;
|
| /xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/ |
| nir_to_vir.c | 590 * with no nir_variable, and we don't count toward VPM size so we
1294 /* GFXH-1684: VPM writes need to be complete by the end of the shader.
1340 struct qreg vpm = vir_reg(QFILE_VPM, vpm_index); local
1350 return vir_MOV(c, vpm);
1360 return vir_MOV(c, vpm);
1451 * driver_location order. This is required for VPM reads, whose data
1452 * is fetched into the VPM in driver_location (TGSI register index)
1753 * be slower if the VPM unit is busy with another QPU.
|
| /xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/ |
| nir_to_vir.c | 1016 * with no nir_variable, and we don't count toward VPM size so we
1792 /* GFXH-1684: VPM writes need to be complete by the end of the shader.
1801 /* GFXH-1684: VPM writes need to be complete by the end of the shader.
1918 struct qreg vpm = vir_reg(QFILE_VPM, vpm_index); local
1928 return vir_MOV(c, vpm);
1938 return vir_MOV(c, vpm);
2421 * be slower if the VPM unit is busy with another QPU.
2498 * our VPM writes are never in non-uniform control flow, but this
2511 * different offsets in the VPM and we need to use the scatter write
3115 * consecutive VPM offsets, so if any output component i
[all...] |
