Searched refs:writeCrtc (Results 1 - 25 of 33) sorted by relevance

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/xsrc/external/mit/xf86-video-openchrome/dist/src/
H A Dvia_id.c44 hwp->writeCrtc(hwp, 0x4F, 0x55);
56 hwp->writeCrtc(hwp, 0x4F, tmp);
H A Dvia_fp.c562 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0x7F);
563 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) | 0x01);
567 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) | 0x10);
571 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) | 0x08);
575 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) | 0x04);
579 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) | 0x02);
582 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0xFD);
586 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0xFB);
590 hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0xF7);
594 hwp->writeCrtc(hw
[all...]
H A Dvia_display.c664 hwp->writeCrtc(hwp, 0x6B, 0x00);
665 hwp->writeCrtc(hwp, 0x6C, 0x00);
666 hwp->writeCrtc(hwp, 0x79, 0x00);
1362 hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
1363 hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
1370 hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
1437 hwp->writeCrtc(hwp, 0x18, temp & 0xFF);
1521 hwp->writeCrtc(hwp, 0x00, temp & 0xFF);
1538 hwp->writeCrtc(hwp, 0x01, temp & 0xFF);
1556 hwp->writeCrtc(hw
[all...]
H A Dvia_vt162x.c637 hwp->writeCrtc(hwp, 0x6A, 0x80);
638 hwp->writeCrtc(hwp, 0x6B, 0x20);
639 hwp->writeCrtc(hwp, 0x6C, 0x80);
643 hwp->writeCrtc(hwp, 0x79, 0x00);
646 hwp->writeCrtc(hwp, 0x6A, 0x00);
647 hwp->writeCrtc(hwp, 0x6B, 0x80);
648 hwp->writeCrtc(hwp, 0x6C, Table.PrimaryCR6C);
777 hwp->writeCrtc(hwp, 0x6A, 0x00);
778 hwp->writeCrtc(hwp, 0x6B, 0x00);
779 hwp->writeCrtc(hw
[all...]
H A Dvia_ch7xxx.c446 hwp->writeCrtc(hwp, j + 0x50, CRTC[j]);
462 hwp->writeCrtc(hwp, 0x79, 0x00);}
470 hwp->writeCrtc(hwp, j, CRTC[j]);
476 hwp->writeCrtc(hwp, 0x6A, Misc[1]);
480 hwp->writeCrtc(hwp, 0x6B, Misc[2] | 0x81);
483 hwp->writeCrtc(hwp, 0x6C, Misc[3] | 0x01);
485 hwp->writeCrtc(hwp, 0x6B, Misc[2] | 0x01);
H A Dvia_vgahw.c105 hwp->writeCrtc(hwp, index, tmp);
H A Dvia_analog.c335 hwp->writeCrtc(hwp, 0x36, CR36);
/xsrc/external/mit/xorg-server.old/dist/hw/xfree86/vgahw/
H A DvgaHW.c334 hwp->writeCrtc = stdWriteCrtc;
541 hwp->writeCrtc = mmioWriteCrtc;
708 hwp->writeCrtc(hwp, 0x17, crtc17);
859 hwp->writeCrtc(hwp, 17, restore->CRTC[17] & ~0x80);
862 hwp->writeCrtc(hwp, i, restore->CRTC[i]);
1805 hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) | 0x80);
1812 hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
1940 hwp->writeCrtc(hwp,0x03,(save->cr03 |0x80));
1942 hwp->writeCrtc(hwp,0x12,DISPLAY_END);
1944 hwp->writeCrtc(hw
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H A DvgaHW.h131 vgaHWWriteIndexProcPtr writeCrtc; member in struct:_vgaHWRec
/xsrc/external/mit/xf86-video-tseng/dist/src/
H A Dtseng_mode.c1005 hwp->writeCrtc(hwp, 0x0C, (Base >> 8) & 0xFF);
1006 hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
1007 hwp->writeCrtc(hwp, 0x33, (Base >> 16) & 0x0F);
1066 hwp->writeCrtc(hwp, 0x34, tsengReg->CR34 & 0xCF);
1192 hwp->writeCrtc(hwp, 0x3F, tsengReg->CR3F);
1193 hwp->writeCrtc(hwp, 0x30, tsengReg->CR30);
1194 hwp->writeCrtc(hwp, 0x31, tsengReg->CR31);
1203 hwp->writeCrtc(hwp, 0x33, tsengReg->CR33);
1204 hwp->writeCrtc(hwp, 0x34, tsengReg->CR34);
1205 hwp->writeCrtc(hw
[all...]
H A Dtseng_cursor.c190 hwp->writeCrtc(hwp, 0x0E, tmp);
193 hwp->writeCrtc(hwp, 0x0F, ((pTseng->HWCursorBufferOffset / 4) >> 8) & 0xFF);
/xsrc/external/mit/xorg-server/dist/hw/xfree86/vgahw/
H A DvgaHW.c332 hwp->writeCrtc = stdWriteCrtc;
540 hwp->writeCrtc = mmioWriteCrtc;
713 hwp->writeCrtc(hwp, 0x17, crtc17);
861 hwp->writeCrtc(hwp, 17, restore->CRTC[17] & ~0x80);
864 hwp->writeCrtc(hwp, i, restore->CRTC[i]);
1800 hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) | 0x80);
1807 hwp->writeCrtc(hwp, 0x11, hwp->readCrtc(hwp, 0x11) & ~0x80);
1932 hwp->writeCrtc(hwp, 0x03, (save->cr03 | 0x80));
1934 hwp->writeCrtc(hwp, 0x12, DISPLAY_END);
1936 hwp->writeCrtc(hw
[all...]
H A DvgaHW.h129 vgaHWWriteIndexProcPtr writeCrtc; member in struct:_vgaHWRec
/xsrc/external/mit/xf86-video-i740/dist/src/
H A Di740_driver.c940 hwp->writeCrtc(hwp, VERT_SYNC_END, temp&0x7F);
996 hwp->writeCrtc(hwp, EXT_VERT_TOTAL, i740Reg->ExtVertTotal);
997 hwp->writeCrtc(hwp, EXT_VERT_DISPLAY, i740Reg->ExtVertDispEnd);
998 hwp->writeCrtc(hwp, EXT_VERT_SYNC_START, i740Reg->ExtVertSyncStart);
999 hwp->writeCrtc(hwp, EXT_VERT_BLANK_START, i740Reg->ExtVertBlankStart);
1000 hwp->writeCrtc(hwp, EXT_HORIZ_TOTAL, i740Reg->ExtHorizTotal);
1001 hwp->writeCrtc(hwp, EXT_HORIZ_BLANK, i740Reg->ExtHorizBlank);
1002 hwp->writeCrtc(hwp, EXT_OFFSET, i740Reg->ExtOffset);
1007 hwp->writeCrtc(hwp, INTERLACE_CNTL, temp);
1070 hwp->writeCrtc(hw
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_driver.c936 hwp->writeCrtc(hwp, EXT_VERT_TOTAL, i810Reg->ExtVertTotal);
937 hwp->writeCrtc(hwp, EXT_VERT_DISPLAY, i810Reg->ExtVertDispEnd);
938 hwp->writeCrtc(hwp, EXT_VERT_SYNC_START, i810Reg->ExtVertSyncStart);
939 hwp->writeCrtc(hwp, EXT_VERT_BLANK_START, i810Reg->ExtVertBlankStart);
940 hwp->writeCrtc(hwp, EXT_HORIZ_TOTAL, i810Reg->ExtHorizTotal);
941 hwp->writeCrtc(hwp, EXT_HORIZ_BLANK, i810Reg->ExtHorizBlank);
942 hwp->writeCrtc(hwp, EXT_OFFSET, i810Reg->ExtOffset);
947 hwp->writeCrtc(hwp, INTERLACE_CNTL, temp);
1058 hwp->writeCrtc(hwp, IO_CTNL, temp);
1842 hwp->writeCrtc(hw
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_driver.c936 hwp->writeCrtc(hwp, EXT_VERT_TOTAL, i810Reg->ExtVertTotal);
937 hwp->writeCrtc(hwp, EXT_VERT_DISPLAY, i810Reg->ExtVertDispEnd);
938 hwp->writeCrtc(hwp, EXT_VERT_SYNC_START, i810Reg->ExtVertSyncStart);
939 hwp->writeCrtc(hwp, EXT_VERT_BLANK_START, i810Reg->ExtVertBlankStart);
940 hwp->writeCrtc(hwp, EXT_HORIZ_TOTAL, i810Reg->ExtHorizTotal);
941 hwp->writeCrtc(hwp, EXT_HORIZ_BLANK, i810Reg->ExtHorizBlank);
942 hwp->writeCrtc(hwp, EXT_OFFSET, i810Reg->ExtOffset);
947 hwp->writeCrtc(hwp, INTERLACE_CNTL, temp);
1058 hwp->writeCrtc(hwp, IO_CTNL, temp);
1842 hwp->writeCrtc(hw
[all...]
/xsrc/external/mit/xf86-video-s3virge/dist/src/
H A Ds3v_hwcurs.c58 #define outCRReg(reg, val) (VGAHWPTR(pScrn))->writeCrtc( VGAHWPTR(pScrn), reg, val )
/xsrc/external/mit/xf86-video-cirrus/dist/src/
H A Dlg_driver.c1526 hwp->writeCrtc(hwp, 0x1A, lgReg->ExtVga[CR1A]);
1527 hwp->writeCrtc(hwp, 0x1B, lgReg->ExtVga[CR1B]);
1530 hwp->writeCrtc(hwp, 0x1D, cr1D);
1531 hwp->writeCrtc(hwp, 0x1E, lgReg->ExtVga[CR1E]);
1950 hwp->writeCrtc(hwp, 0x0C, (Base >> 8) & 0xFF);
1951 hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
1955 hwp->writeCrtc(hwp, 0x1B, tmp);
1958 hwp->writeCrtc(hwp, 0x1D, tmp);
2236 hwp->writeCrtc(hwp, 0x1A, cr1a);
2257 hwp->writeCrtc
[all...]
H A Dalp_driver.c1177 hwp->writeCrtc(hwp, 0x1A, cirReg->ExtVga[CR1A]);
1178 hwp->writeCrtc(hwp, 0x1B, cirReg->ExtVga[CR1B]);
1179 hwp->writeCrtc(hwp, 0x1D, cirReg->ExtVga[CR1D]);
1776 hwp->writeCrtc(hwp, 0x0C, (Base >> 8) & 0xff);
1777 hwp->writeCrtc(hwp, 0x0D, Base & 0xff);
1782 hwp->writeCrtc(hwp, 0x1B, tmp);
1786 hwp->writeCrtc(hwp, 0x1D, tmp);
2086 hwp->writeCrtc(hwp, 0x2D, lcdCrtl | 0x80);
2111 hwp->writeCrtc(hwp, 0x2D, lcdCrtl);
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di810_driver.c1283 hwp->writeCrtc(hwp, EXT_VERT_TOTAL, i810Reg->ExtVertTotal);
1284 hwp->writeCrtc(hwp, EXT_VERT_DISPLAY, i810Reg->ExtVertDispEnd);
1285 hwp->writeCrtc(hwp, EXT_VERT_SYNC_START, i810Reg->ExtVertSyncStart);
1286 hwp->writeCrtc(hwp, EXT_VERT_BLANK_START, i810Reg->ExtVertBlankStart);
1287 hwp->writeCrtc(hwp, EXT_HORIZ_TOTAL, i810Reg->ExtHorizTotal);
1288 hwp->writeCrtc(hwp, EXT_HORIZ_BLANK, i810Reg->ExtHorizBlank);
1289 hwp->writeCrtc(hwp, EXT_OFFSET, i810Reg->ExtOffset);
1294 hwp->writeCrtc(hwp, INTERLACE_CNTL, temp);
1405 hwp->writeCrtc(hwp, IO_CTNL, temp);
2216 hwp->writeCrtc(hw
[all...]
/xsrc/external/mit/xf86-video-mga/dist/src/
H A Dmga_vga.c278 hwp->writeCrtc(hwp, 17, restore->CRTC[17] & ~0x80);
281 hwp->writeCrtc(hwp, i, restore->CRTC[i]);
/xsrc/external/mit/xf86-video-neomagic/dist/src/
H A Dneo.h293 #define VGAwCR(index, val) (*hwp->writeCrtc)(hwp, index, val)
/xsrc/external/mit/xf86-video-savage/dist/src/
H A Dsavage_cursor.c56 #define outCRReg(reg, val) (VGAHWPTR(pScrn))->writeCrtc( VGAHWPTR(pScrn), reg, val )
/xsrc/external/mit/xf86-video-nv/dist/src/
H A Driva_setup.c205 pVga->writeCrtc = RivaWriteCrtc;
/xsrc/external/mit/xf86-video-chips/dist/src/
H A Dct_regs.c495 hwp->writeCrtc = chipsMmioWriteCrtc;

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