| /src/external/gpl3/gdb/dist/gdb/ |
| amd64-nat.c | 53 int *reg_offset = amd64_native_gregset64_reg_offset; local
60 reg_offset = amd64_native_gregset32_reg_offset;
70 return reg_offset[regnum];
|
| bfin-linux-tdep.c | 105 const int *reg_offset = bfin_linux_sigcontext_reg_offset; local
109 if (reg_offset[i] != -1)
110 trad_frame_set_reg_addr (this_cache, i, sigcontext + reg_offset[i]);
|
| hppa-netbsd-tdep.c | 120 int *reg_offset; local
124 reg_offset = hppanbsd_mc_reg_offset;
135 if (reg_offset[i] != -1)
136 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
|
| sh-netbsd-tdep.c | 175 const int *reg_offset;
179 reg_offset = shnbsd_mc_reg_offset;
187 if (reg_offset[i] != -1)
188 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
173 const int *reg_offset; local
|
| tic6x-linux-tdep.c | 96 unsigned int reg_offset; local
101 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
102 gdb_assert (reg_offset != 0);
104 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
109 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
110 gdb_assert (reg_offset != 0);
112 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
118 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
119 gdb_assert (reg_offset != 0);
121 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
[all...] |
| i386-gnu-nat.c | 43 #define REG_OFFSET(reg) offsetof (struct i386_thread_state, reg)
45 /* At REG_OFFSET[N] is the offset to the thread_state_t location where
47 static int reg_offset[] = variable
49 REG_OFFSET (eax), REG_OFFSET (ecx), REG_OFFSET (edx), REG_OFFSET (ebx),
50 REG_OFFSET (uesp), REG_OFFSET (ebp), REG_OFFSET (esi), REG_OFFSET (edi)
[all...] |
| i386-netbsd-tdep.c | 340 int *reg_offset; local
346 reg_offset = i386nbsd_sc_reg_offset;
354 reg_offset = i386nbsd_mc_reg_offset;
364 if (reg_offset[i] != -1)
365 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
|
| /src/external/gpl3/gdb.old/dist/gdb/ |
| amd64-nat.c | 53 int *reg_offset = amd64_native_gregset64_reg_offset; local
60 reg_offset = amd64_native_gregset32_reg_offset;
70 return reg_offset[regnum];
|
| bfin-linux-tdep.c | 105 const int *reg_offset = bfin_linux_sigcontext_reg_offset; local
109 if (reg_offset[i] != -1)
110 trad_frame_set_reg_addr (this_cache, i, sigcontext + reg_offset[i]);
|
| hppa-netbsd-tdep.c | 120 int *reg_offset; local
124 reg_offset = hppanbsd_mc_reg_offset;
135 if (reg_offset[i] != -1)
136 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
|
| sh-netbsd-tdep.c | 175 const int *reg_offset;
179 reg_offset = shnbsd_mc_reg_offset;
187 if (reg_offset[i] != -1)
188 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
173 const int *reg_offset; local
|
| tic6x-linux-tdep.c | 96 unsigned int reg_offset; local
101 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
102 gdb_assert (reg_offset != 0);
104 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
109 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
110 gdb_assert (reg_offset != 0);
112 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
118 reg_offset = tic6x_register_sigcontext_offset (i, gdbarch);
119 gdb_assert (reg_offset != 0);
121 trad_frame_set_reg_addr (this_cache, i, base + reg_offset);
[all...] |
| i386-gnu-nat.c | 43 #define REG_OFFSET(reg) offsetof (struct i386_thread_state, reg)
45 /* At REG_OFFSET[N] is the offset to the thread_state_t location where
47 static int reg_offset[] = variable
49 REG_OFFSET (eax), REG_OFFSET (ecx), REG_OFFSET (edx), REG_OFFSET (ebx),
50 REG_OFFSET (uesp), REG_OFFSET (ebp), REG_OFFSET (esi), REG_OFFSET (edi)
[all...] |
| i386-netbsd-tdep.c | 340 int *reg_offset; local
346 reg_offset = i386nbsd_sc_reg_offset;
354 reg_offset = i386nbsd_mc_reg_offset;
364 if (reg_offset[i] != -1)
365 trad_frame_set_reg_addr (this_cache, i, base + reg_offset[i]);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| common_baco.h | 40 uint32_t reg_offset; member in struct:baco_cmd_entry
52 uint32_t reg_offset; member in struct:soc15_baco_cmd_entry
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| soc15.h | 51 uint32_t reg_offset; member in struct:soc15_reg_entry
61 uint32_t reg_offset; member in struct:soc15_allowed_register_entry
70 uint32_t reg_offset; member in struct:soc15_ras_field_entry
79 #define SOC15_REG_ENTRY_OFFSET(entry) (adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset)
|
| amdgpu_jpeg_v1_0.c | 41 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t val)
45 if (((reg_offset >= 0x1f800) && (reg_offset <= 0x21fff)) ||
46 ((reg_offset >= 0x1e000) && (reg_offset <= 0x1e1ff))) {
48 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0);
50 ring->ring[(*ptr)++] = reg_offset;
60 uint32_t reg, reg_offset, val, mask, i; local
64 reg_offset = (reg << 2);
66 jpeg_v1_0_decode_ring_patch_wreg(ring, &ptr, reg_offset, val)
350 uint32_t reg_offset = (reg << 2); local
394 uint32_t reg_offset = (reg << 2); local
[all...] |
| mmsch_v1_0.h | 65 uint32_t reg_offset : 28; member in struct:mmsch_v1_0_cmd_direct_reg_header
70 uint32_t reg_offset : 20; member in struct:mmsch_v1_0_cmd_indirect_reg_header
103 uint32_t reg_offset,
106 direct_wt->cmd_header.reg_offset = reg_offset;
113 uint32_t reg_offset,
116 direct_rd_mod_wt->cmd_header.reg_offset = reg_offset;
125 uint32_t reg_offset,
128 direct_poll->cmd_header.reg_offset = reg_offset
[all...] |
| /src/external/gpl3/gcc.old/dist/libgcc/config/mips/ |
| linux-unwind.h | 51 _Unwind_Ptr new_cfa, reg_offset; local
100 reg_offset = 4;
102 reg_offset = 0;
108 = (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
|
| /src/external/gpl3/gcc/dist/libgcc/config/mips/ |
| linux-unwind.h | 51 _Unwind_Ptr new_cfa, reg_offset; local
100 reg_offset = 4;
102 reg_offset = 0;
108 = (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
|
| /src/external/gpl3/gdb/dist/sim/bfin/ |
| dv-eth_phy.c | 41 #define reg_offset(reg) (offsetof(struct eth_phy, reg) - reg_base()) macro
42 #define reg_idx(reg) (reg_offset (reg) / 4)
|
| /src/external/gpl3/gdb.old/dist/sim/bfin/ |
| dv-eth_phy.c | 41 #define reg_offset(reg) (offsetof(struct eth_phy, reg) - reg_base()) macro
42 #define reg_idx(reg) (reg_offset (reg) / 4)
|
| /src/sys/dev/isa/ |
| nca_isa.c | 123 nca_isa_test(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t reg_offset)
127 bus_space_write_1(iot, ioh, reg_offset + C80_ICR, SCI_ICMD_RST);
128 bus_space_write_1(iot, ioh, reg_offset + C80_ODR, 0);
132 if (bus_space_read_1(iot, ioh, reg_offset + C80_CSBR) != SCI_BUS_RST) {
135 __func__, bus_space_read_1(iot, ioh, reg_offset+C80_CSBR));
137 bus_space_write_1(iot, ioh, reg_offset+C80_ICR, 0);
141 bus_space_write_1(iot, ioh, reg_offset + C80_ICR, 0);
146 bus_space_read_1(iot, ioh, reg_offset + C80_RPIR);
150 if (bus_space_read_1(iot, ioh, reg_offset + C80_BSR) & (SCI_CSR_PERR |
154 __func__, bus_space_read_1(iot, ioh, reg_offset+C80_BSR))
179 bus_size_t base_offset, reg_offset = 0; local
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_ni_dma.c | 197 u32 reg_offset, wb_offset; local
203 reg_offset = DMA0_REGISTER_OFFSET;
207 reg_offset = DMA1_REGISTER_OFFSET;
211 WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0);
212 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0);
220 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl);
223 WREG32(DMA_RB_RPTR + reg_offset, 0);
224 WREG32(DMA_RB_WPTR + reg_offset, 0);
227 WREG32(DMA_RB_RPTR_ADDR_HI + reg_offset,
229 WREG32(DMA_RB_RPTR_ADDR_LO + reg_offset,
[all...] |
| /src/usr.bin/scmdctl/ |
| common.c | 221 uint8_t reg, reg_index = 0, reg_offset = 0; local
241 reg_offset = motor_index / 8;
244 reg = SCMD_REG_INV_2_9 + reg_offset;
246 fprintf(stderr,"common_invert_motor: remote invert: motor_index: %d ; reg_offset: %d ; reg_index: %02X ; reg: %02X\n",motor_index,reg_offset,reg_index,reg);
263 uint8_t reg, reg_index = 0, reg_offset = 0; local
276 reg_offset = module_index / 8;
279 reg = SCMD_REG_BRIDGE_SLV_L + reg_offset;
281 fprintf(stderr,"common_bridge_motor: remote bridge: module_index: %d ; reg_offset: %d ; reg_index: %02X ; reg: %02X\n",module_index,reg_offset,reg_index,reg)
[all...] |
