Searched refs:CLK_TOP_UNIVPLL2_D4 (Results 1 - 13 of 13) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmt8135-clk.h51 #define CLK_TOP_UNIVPLL2_D4 38 macro
H A Dmt7629-clk.h57 #define CLK_TOP_UNIVPLL2_D4 45 macro
H A Dmt6765-clk.h64 #define CLK_TOP_UNIVPLL2_D4 27 macro
H A Dmt6797-clk.h75 #define CLK_TOP_UNIVPLL2_D4 63 macro
H A Dmt7622-clk.h51 #define CLK_TOP_UNIVPLL2_D4 37 macro
H A Dmt8173-clk.h80 #define CLK_TOP_UNIVPLL2_D4 68 macro
H A Dmediatek,mt6795-clk.h78 #define CLK_TOP_UNIVPLL2_D4 65 macro
H A Dmt2701-clk.h42 #define CLK_TOP_UNIVPLL2_D4 30 macro
H A Dmt2712-clk.h64 #define CLK_TOP_UNIVPLL2_D4 31 macro
H A Dmediatek,mt8365-clk.h39 #define CLK_TOP_UNIVPLL2_D4 27 macro
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi253 <&topckgen CLK_TOP_UNIVPLL2_D4>;
323 <&topckgen CLK_TOP_UNIVPLL2_D4>,
390 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>,
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi556 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
635 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
648 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
661 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
674 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
H A Dmt8365.dtsi605 clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,

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