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    Searched refs:SamuLevel (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu7_fusion.h 240 SMU7_Fusion_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
smu7_discrete.h 333 SMU7_Discrete_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
smu72_discrete.h 275 SMU72_Discrete_ExtClkLevel SamuLevel[SMU72_MAX_LEVELS_SAMU];
smu73_discrete.h 259 SMU73_Discrete_ExtClkLevel SamuLevel [SMU73_MAX_LEVELS_SAMU];
smu74_discrete.h 291 SMU74_Discrete_ExtClkLevel SamuLevel[SMU74_MAX_LEVELS_SAMU];
smu75_discrete.h 297 SMU75_Discrete_ExtClkLevel SamuLevel [SMU75_MAX_LEVELS_SAMU];
  /src/sys/external/bsd/drm2/dist/drm/radeon/
smu7_fusion.h 240 SMU7_Fusion_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
smu7_discrete.h 332 SMU7_Discrete_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
radeon_ci_dpm.c 2773 table->SamuLevel[count].Frequency =
2775 table->SamuLevel[count].MinVoltage =
2777 table->SamuLevel[count].MinPhases = 1;
2781 table->SamuLevel[count].Frequency, false, &dividers);
2785 table->SamuLevel[count].Divider = (u8)dividers.post_divider;
2787 table->SamuLevel[count].Frequency = cpu_to_be32(table->SamuLevel[count].Frequency);
2788 table->SamuLevel[count].MinVoltage = cpu_to_be16(table->SamuLevel[count].MinVoltage);
radeon_kv_dpm.c 1012 offsetof(SMU7_Fusion_DpmTable, SamuLevel),
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_dpm.c 1095 offsetof(SMU7_Fusion_DpmTable, SamuLevel),

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